Pedestal pocket tray containment system for integrated circuit chips

Abstract

A stacking tray for electrical components, such as integrated circuit chips, particularly those of the ball grid array (BGA) type is disclosed. The tray is stackable and includes an upper side and a lower side. An array of storage pockets is formed between the upper side of a lower tray and the lower side of an upper tray. The storage pockets are separated by complementary support elements and further include a segmented pedestal arising from the center of the storage pocket, on the upper side of the trays. The segmented pedestal supports the integrated circuit chip, without interfering with the spherical balls. Moreover, the tray allows for variation of the dimensions of the integrated circuit chip while adequately stabilizing the chip.

1 . A tray for integrated circuit chips comprising:
 a plurality of storage pockets, said storage pockets being bounded at corners thereof by support elements;   said storage pockets further including a pedestal for supporting an integrated chip thereon.   
   
   
       2 . The tray for integrated circuit chips of  claim 1  wherein said pedestal is spaced from said support elements thereby allowing storage of integrated chips in said storage pockets free of contact with ball grid elements formed on the integrated circuit chips. 
   
   
       3 . The tray for integrated circuit chips of  claim 1  wherein the tray is stackable with sequential like trays. 
   
   
       4 . The tray for integrated circuit chips of  claim 3  including an upper side and a lower side, wherein an upper side of a tray joins with a lower side of a successively upper tray thereby aligning respective storage pockets to store integrated chips therebetween. 
   
   
       5 . The tray for integrated circuit chips of  claim 4  wherein said pedestal is formed on said upper side of the tray. 
   
   
       6 . The tray for integrated circuit chips of  claim 5  wherein said support elements are formed on said upper side and said lower side and when a lower tray is stacked and aligned with an upper tray, support elements of the upper side of the lower tray seat with support elements of the lower side of the upper tray. 
   
   
       7 . The tray for integrated circuit chips of  claim 6  wherein at least a portion of said support elements includes slots for providing seats for receiving corresponding support elements. 
   
   
       8 . The tray for integrated circuit chips of  claim 7  wherein said at least a portion of said support elements including slots further include ledges formed at a height lower than a height of said support elements. 
   
   
       9 . The tray for integrated circuit chips of  claim 6  wherein said pedestal is formed from a plurality of segments. 
   
   
       10 . The tray for integrated circuit chips of  claim 9  wherein said segments include protrusions extending toward corners of said storage pockets. 
   
   
       11 . The tray for integrated circuit chips of  claim 6  wherein said pedestal is rotationally segmented. 
   
   
       12 . The tray for integrated circuit chips of  claim 6  wherein chips stored between an upper and a lower tray are at least partially engaged between said support elements of the upper and lower trays thereby stabilizing the chips in a direction perpendicular to the tray. 
   
   
       13 . The tray for integrated circuit chips of  claim 12  wherein said support elements on said upper side are directly above said support elements on said lower side. 
   
   
       14 . The tray for integrated circuit chips of  claim 13  wherein X-shaped support elements are formed at an intersection of four storage pockets, T-shaped support elements are formed at an intersection of two storage pockets along sides of the tray and L-shaped support elements are formed at outward corners of corner storage pockets. 
   
   
       15 . The tray for integrated circuit chips of  claim 14  wherein the tray is rectangular with rows and columns of storage pockets. 
   
   
       16 . The tray for integrated circuit chips of  claim 15  including a planar floor for supporting said support elements and said pedestals. 
   
   
       17 . The tray for integrated circuit chips of  claim 16  wherein said planar floor is solid through at least a portion of said storage pockets thereby forming vacuum storage pockets to permit vacuum operated equipment to couple to the tray. 
   
   
       18 . The tray for integrated circuit chips of  claim 17  wherein said planar floor includes apertures in at least a portion of said storage pockets. 
   
   
       19 . The tray for integrated circuit chips of  claim 18  wherein said apertures are octant-oriented within said storage pockets. 
   
   
       20 . The tray for integrated circuit chips of  claim 18  wherein said segments span at least a portion of said apertures.