US2008164895A1PendingUtilityA1
Device for probe card power bus noise reduction
Est. expiryMar 1, 2025(expired)· nominal 20-yr term from priority
Inventors:Raphael P. Robertazzi
G01R 31/2879G01R 31/31721G01R 31/31723
45
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Claims
Abstract
Noise reduction for application of structural test patterns to a Device Under Test (DUT) is accomplished with a capacitor “booster” bypass network on the probe card in which the capacitors are charged to a much higher voltage V boost than the DUT power supply voltage VDD. Charging the capacitors to a voltage N×VDD allows the buster network to store N times the charge of a conventionally configured capacitance network, and effectively provides N times the capacitance of the original network in the same physical space.
Claims
exact text as granted — not AI-modified1 . A voltage drop suppression device for maintaining constant voltage on a power bus of a probe card used for semiconductor wafer testing, the device comprising:
a bypass capacitor mounted the probe card, wherein the bypass capacitor is charged to a voltage greater than a power supply voltage VTDD of a device under test; and an active regulation circuit controlling the discharge of the bypass capacitor to supply current to the power bus for suppressing a voltage drop on the power bus generated by a current surge during testing of the device under test.
2 . The voltage drop suppression device recited in claim 1 , wherein the active regulation circuit is self regulating, not requiring synchronization to an external test of any kind, nor any kind of calibration sequence prior to use.
3 . The noise voltage drop suppression device recited in claim 1 , wherein the bypass capacitor is implemented as a bank of bypass capacitors.
4 . (canceled)
5 . (canceled)
6 . The voltage drop suppression device recited in claim 1 , wherein the bypass capacitor is charged to a voltage at least 10 times the voltage of the power supply voltage VDD.
7 . The voltage drop suppression device recited in claim 1 , wherein the bypass capacitor is charged to a voltage at least 2 times the voltage of the power supply voltage VDD.
8 . The voltage drop suppression device recited in claim 1 , wherein said bypass capacitor is charged to a maximum capacity.Join the waitlist — get patent alerts
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