US2008160690A1PendingUtilityA1

Flash memory device and method for fabricating the same

Assignee: DONGBU ELECTRONICS CO LTDPriority: Jul 21, 2005Filed: Feb 28, 2008Published: Jul 3, 2008
Est. expiryJul 21, 2025(expired)· nominal 20-yr term from priority
Inventors:Sang Woo Nam
H10D 84/038H10D 84/0133H10B 41/10H10B 41/30H10B 69/00
48
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Claims

Abstract

A flash memory device including an isolation layer for defining active regions in a semiconductor substrate. The active region is a region in which flash memory cells are to be formed. The device also includes a gate stack is formed to come across the active region and the isolation layer, and a sidewall spacer is formed at sidewalls of the gate stack. The device further includes a common source line that electrically interconnects a plurality of sources of a plurality of the flash memory cells, and is formed in the isolation layer by removing an insulating material in the isolation layer and is formed in parallel to a word line formed over the gate stack. A silicide layer is formed in the common source line.

Claims

exact text as granted — not AI-modified
1 - 5 . (canceled) 
   
   
       6 . A method for manufacturing a flash memory device, comprising the steps of: forming an isolation layer for defining active regions in a semiconductor substrate, said active region being a region in which flash memory cells are to be formed; forming a gate stack that comes across the active region and the isolation layer; forming source and drain regions at both sides of the gate stack; removing insulating material in the isolation layer that is near to the source regions to form a common source line which is parallel to a word line formed over the gate stack; and forming a silicide layer in the common source line. 
   
   
       7 . The method of  claim 6 , wherein the step of forming the common source line comprises the steps of: depositing a conformal spacer insulating material on the entire surface of the semiconductor substrate; recessing the deposited spacer insulating material on the source regions; and selectively etching the spacer insulating material to form sidewall spacers at sidewalls of the gate stack. 
   
   
       8 . The method of  claim 7 , wherein the spacer insulating material has an etch selectivity to the isolation layer and is formed by silicon nitride. 
   
   
       9 . The method of  claim 7 , wherein the step of removing the insulating material in the isolation layer is carried out with reference to the sidewall spacers.

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