Radiation tolerant electrostatic discharge protection networks

Abstract

An ESD network. The ESD network including a redundant voltage clamping element in series with a first voltage clamping element between two voltage pads. The ESD network may be connected to a power voltage pad or a signal voltage pad either directly or through a dummy voltage pad. The voltage clamping elements may further comprise an array of unit cells wherein the array is electrically equivalent to single large transistors currently used in ESD networks. By creating an ESD network as an array of unit cells, benefits greater than those obtained by using a single transistor as a clamping or a trigger element are realized such as increased ballast resistance and less overall damage to the circuitry resulting from cosmic rays and particles.

1 . A fault tolerant electrostatic discharge network, comprising:
 a first trigger element;   a first array of unit cells initialized by said first trigger element, each unit cell of said first array comprising a plurality of transistors, an electrical sum of all unit cells of said first array being electrically equivalent to a first single voltage clamp element connected to said first trigger circuit element;   a second trigger element, said first trigger element coupled in series with said second trigger element; and   a second array of unit cells initialized by said second trigger element, each unit cell of said second array comprising a plurality of transistors, an electrical sum of all unit cells of said second array being electrically equivalent to a second single voltage clamp, said second array coupled in series with said first array.   
   
   
       2 . The fault tolerant electrostatic discharge network of  claim 1 , wherein every unit cell of said first array is different. 
   
   
       3 . The fault tolerant electrostatic discharge network of  claim 1 , wherein every unit cell of said first array of unit cells is the same. 
   
   
       4 . The fault tolerant electrostatic discharge network of  claim 1 , wherein at least one unit cell of said first array is different from at least one other unit cell of said first array. 
   
   
       5 . The fault tolerant electrostatic discharge network of  claim 1 , wherein each unit cell of said second array is different. 
   
   
       6 . The fault tolerant electrostatic discharge network of  claim 1 , wherein each unit cell of said second array of unit cells is the same. 
   
   
       7 . The fault tolerant electrostatic discharge network of  claim 1 , wherein at least one unit cell of said second array is different from at least one other unit cell of said second array. 
   
   
       8 . The fault tolerant electrostatic discharge network of  claim 1 , wherein every unit cell of said first array and every unit cell of said second array of unit cells are different. 
   
   
       9 . The fault tolerant electrostatic discharge network of  claim 1 , wherein every unit cell of said first array and every unit cell of said second array is the same unit. 
   
   
       10 . The fault tolerant electrostatic discharge network of  claim 1 , wherein at least one unit cell of said first array or of said second array is different from at least one other unit cell of said first array or said second array. 
   
   
       11 . The fault tolerant electrostatic discharge network of  claim 1 , wherein the said unit cells of said first array and said unit cells of said second array are separated by a charge barrier. 
   
   
       12 . The fault tolerant electrostatic discharge network of  claim 11  wherein the charge barrier is a trench. 
   
   
       13 . The fault tolerant electrostatic discharge network of  claim 11  wherein the charge barrier is a set of N-wells. 
   
   
       14  The fault tolerant electrostatic discharge network of  claim 11  wherein the charge barrier is a substrate contact. 
   
   
       15 . A method, comprising:
 (a) defining a reliability requirement of an integrated circuit for a single event upset;   (b) defining an electrostatic discharge requirement using a technology database file and electrostatic discharge data;   (c) defining circuit topology having a redundant electrostatic discharge element in series with a voltage clamping element of the electrostatic discharge protection network to be applied between a first voltage and a second voltage in the integrated circuit;   (d) defining a unit cell to comprise the redundant electrostatic discharge element using a single event upset simulation tool;   (e) evaluating the probability of failure of the electrostatic discharge protection network; and   (f) adding a design of said electrostatic discharge protection network to a design of said integrated circuit.   
   
   
       16 . The method of  claim 15 , further including:
 between steps (e) and (f), repeating steps (b) through (e) until said design of said electrostatic discharge protection network meets said reliability of said integrated circuit.