US2008155199A1PendingUtilityA1
Method and apparatus for dma-generated memory write-back
Est. expiryNov 19, 2024(expired)· nominal 20-yr term from priority
G06F 13/28
52
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Claims
Abstract
A method for memory write-back provides a memory access controller and then generates a write-back pattern in the memory access controller. The write-back pattern is then written back into a memory starting at a predetermined address location and continuing for a predetermined length of the addressing space of the memory.
Claims
exact text as granted — not AI-modified1 . A memory access controller comprising:
circuitry for generating a write-back pattern configured to generate all of the write-back pattern; and circuitry for writing-back the write-back pattern into a memory starting at a predetermined address location and continuing for a predetermined length of the addressing space of the memory.
2 . The memory access controller of claim 1 , wherein the write-back pattern is a clearing pattern.
3 . The memory access controller of claim 1 , wherein the write-back pattern is a repeating write-back data pattern.
4 . The memory access controller of claim 1 , wherein the write-back pattern is a repeating write-back data pattern that is a standard pattern that is programmed into the memory access controller.
5 . The memory access controller of claim 1 , wherein the circuitry for writing back coupled to a printer memory.
6 . The memory access controller of claim 1 , wherein the circuitry for writing-back the write-back pattern is configured to perform the memory write-back in a memory clearing mode or a memory filling mode.
7 . The memory access controller of claim 1 , wherein the circuitry for writing back coupled to a memory of a portable computing device.Join the waitlist — get patent alerts
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