Method for manufacturing semiconductor devices and plug

Abstract

A method for manufacturing a semiconductor device is disclosed. The method is suitable for a substrate having a first conducting structure and a first dielectric layer, wherein the dielectric layer covers the first conductive structure. The method includes the steps of forming a second conductive structure over the substrate adjacent to the first conductive structure. Then, the size of the second conductive structure is reduced so that a top surface of the second conductive structure is relatively lower than that of the first conductive structure. Thereafter, a second dielectric layer is formed over the substrate to cover the first and the second conductive structure. A via is formed in the second dielectric layer to expose the top surface of the first conductive structure. Finally, a via plug is formed in the via.

What is claimed is: 
     
         1 . A fabrication method of a semiconductor device, comprising:
 forming a first conducting structure on a substrate;   forming a first dielectric layer on the first conducting structure;   forming a second conducting structure on the first conducting structure covered by the first dielectric layer and on the substrate;   forming a spacer at two sides of the first conducting structure and on the second conducting structure;   removing a portion of the second conducting structure for an upper surface of the second conducting structure to be lower than an upper surface of the first conducting structure to form a first depression between the spacer and the first conducting structure and for the second conducting structure which is disposed between the spacer and the substrate to recede toward the side wall of the first conducting structure to form a second depression;   forming a second dielectric layer to cover the second conducting structure and fill the first depression and the second depression; and   forming a plug in the second dielectric layer.   
     
     
         2 . The fabrication method of a semiconductor device as recited in  claim 1 , wherein the step of removing a portion of the second conducting structure comprises performing an isotropic etching process. 
     
     
         3 . The fabrication method of a semiconductor device as recited in  claim 2 , wherein the isotropic etching process further comprises of an etching solution, and the etching solution comprises an ammonia-hydrogen peroxide solution. 
     
     
         4 . The fabrication method of a semiconductor device as recited in  claim 3 , wherein a composition ratio for ammonia, hydrogen peroxide and water in the ammonia-hydrogen peroxide solution ranges between 1˜5:1:100˜500. 
     
     
         5 . The fabrication method of a semiconductor device as recited in  claim 3 , wherein a temperature for the ammonia-hydrogen peroxide solution ranges between 70˜90° C. 
     
     
         6 . The fabrication method of a semiconductor device as recited in  claim 1 , wherein a material for the second conducting structure is selected from the group consisting of polysilicon, silicide, and polysilicon/silicon tungsten. 
     
     
         7 . A fabrication method for a plug, which is applicable to a substrate already comprising a first conducting structure and a first dielectric layer thereon, and the first dielectric layer covering the first conducting structure; the fabrication method comprising:
 forming a second conducting structure on the substrate beside a side of the first conducting structure;   reducing a size of the second conducting structure for an upper surface of the second conducting structure to be lower than an upper surface of the first conducting structure;   forming a second dielectric layer on the substrate, wherein the second dielectric layer covers the first conducting structure and the second conducting structure;   forming a via in the second dielectric layer; and   forming a via plug in the via.   
     
     
         8 . The fabrication method for the plug as recited in  claim 7 , wherein the step of reducing the second conducting structure comprises a wet etching process. 
     
     
         9 . The fabrication method for the plug as recited in  claim 8 , wherein an etching solution for the wet etching process comprises an ammonia-hydrogen peroxide. 
     
     
         10 . The fabrication method for the plug as recited in  claim 9 , wherein a composition ratio of ammonia, hydrogen peroxide and water in the ammonia-hydrogen peroxide solution ranges between 1˜5:1:100˜500. 
     
     
         11 . The fabrication method for the plug as recited in  claim 9 , wherein a temperature of the ammonia-hydrogen peroxide solution ranges between 70˜90° C. 
     
     
         12 . The fabrication method of a semiconductor device as recited in  claim 7 , wherein the via exposes the upper surface of the first conducting structure.