Method for fabricating semiconductor devices using strained silicon bearing material

Abstract

A method of manufacturing an integrated circuit on semiconductor substrates. The method includes providing a semiconductor substrate characterized by a first lattice with a first structure and a first spacing. The semiconductor substrate has an overlying film of material with a second lattice with a second structure and a second spacing. Preferably, the second spacing placing the film of material in either a tensile or compressive mode across the entirety of the film of material relative to the semiconductor substrate with the first structure and the first spacing. The method includes processing the film of material to form a first region and a second region within the film of material. The first region and the second region are characterized by either the tensile or compressive mode. Preferably, both the first and second regions in their entirety are characterized by either the tensile or compressive mode. The method includes processing the first region of the film of material while maintaining the second region characterized by either the tensile or the compressive mode to form an opposite characteristic from the second region. The opposite characteristic is a tensile mode if the second region is in the compressive mode and the opposite characteristic is the compressive mode if the second region is in the tensile mode.

1 - 14 . (canceled) 
   
   
       15 . A method of manufacturing an integrated circuit on semiconductor substrates, the method comprising:
 providing a semiconductor substrate characterized by a first lattice with a first structure and a first spacing, the semiconductor substrate having an overlying film of material with a second lattice with a second structure and a second spacing, the second spacing placing the film of material in a first tensile mode and/or compressive mode along the film surface crystal axes across a portion of the film of material relative to the semiconductor substrate with the first structure and the first spacing; and   processing a predetermined region in the film of material to cause the first tensile mode to change to a second tensile mode if the film of material is in the first tensile mode or cause the first compressive mode to change to a second compressive mode if the film of material is in the first compressive mode.   
   
   
       16 . The method of  claim 15  wherein the second spacing places the film of material in the tensile mode. 
   
   
       17 . The method of  claim 15  wherein the second spacing places the film of material in the compressive mode. 
   
   
       18 . The method of  claim 15  wherein the processing of the predetermined region comprises:
 forming a source recessed region and a drain recessed region with a channel region between the source recessed region and the drain recessed region within a vicinity of the predetermined region;   depositing an epitaxial material with a third structure and a third lattice constant, the third lattice constant being different from the second lattice constant; and doping the epitaxial material;   whereupon the epitaxial material causes the second tensile mode within the channel region in the predetermined region.   
   
   
       19 . The method of  claim 18  wherein the dopant is selected from germanium or carbon. 
   
   
       20 . The method of  claim 18  wherein the predetermined region comprises at least one N-type MOS type transistor. 
   
   
       21 . The method of  claim 15  wherein the predetermined region comprises a plurality of N-type MOS transistors. 
   
   
       22 . The method of  claim 15  wherein the film of material is strained silicon bearing material. 
   
   
       23 . The method of  claim 22  wherein the strained silicon bearing material is overlying an epitaxial silicon-germanium material, the epitaxial silicon-germanium material overlying the semiconductor substrate. 
   
   
       24 . The method of  claim 15  wherein the processing of the predetermined region comprises:
 forming a capping layer overlying a channel region to cause stress therein, the channel region being coupled between a source region and a drain region of an MOS transistor;   whereupon the capping layer causes the predetermined region to be in the second compressive mode.   
   
   
       25 . The method of  claim 24  wherein the capping layer is provided by depositing a thickness of silicon nitride bearing material overlying the channel region. 
   
   
       26 . The method of  claim 15  wherein the first lattice structure is for a lattice structure for a silicon substrate and the second lattice structure is for a strained silicon material. 
   
   
       27 . The method of  claim 26  further comprising forming an insulating material overlying the semiconductor substrate, the insulating material being between the semiconductor substrate and the film of material. 
   
   
       28 . The method of  claim 26  wherein the film of material consisting of strained silicon bearing material is overlying an epitaxial silicon-germanium material. 
   
   
       29 . The method of  claim 15  wherein the first tensile and/or compressive mode is characterized by a uniaxial strain characteristic. 
   
   
       30 . The method of  claim 15  wherein the first tensile or compressive mode is characterized by a biaxial strain characteristic. 
   
   
       31 . The method of  claim 15  wherein the second compressive mode is characterized by a second strain value that has a higher absolute value than a first strain value of the first compressive mode. 
   
   
       32 . The method of  claim 15  wherein the second tensile mode is characterized by a second strain value that has a higher absolute value than a first strain value of the first tensile mode. 
   
   
       33 . The method of  claim 15  wherein the second compressive mode is characterized by a second strain value that has a higher real value than a first strain value of the first compressive mode. 
   
   
       34 . The method of  claim 15  wherein the second tensile mode is characterized by a second strain value that has a higher real value than a first strain value of the first tensile mode. 
   
   
       35 . The method of  claim 15  wherein the predetermined region is for a channel region of a transistor for a microprocessor device or a memory device or a logic device. 
   
   
       36 . The method of  claim 15  wherein the predetermined region is for a channel region having a channel length in a direction of a <110> crystal direction of the semiconductor substrate. 
   
   
       37 . The method of  claim 15  wherein the predetermined region is for a channel region having a channel length in an orthogonal direction of a <110> crystal direction of the semiconductor substrate. 
   
   
       38 . The method of  claim 15  wherein the predetermined region is for a channel region having a channel length in a <111> crystal direction of the semiconductor substrate. 
   
   
       39 . The method of  claim 15  wherein the predetermined region is for a channel region having a channel length in a <100> crystal direction of the semiconductor substrate. 
   
   
       40 . A method of manufacturing an integrated circuit on semiconductor substrates, the method comprising:
 providing a semiconductor substrate characterized by a first lattice with a first structure and a first spacing, the semiconductor substrate having an overlying film of material with a second lattice with a second structure and a second spacing, the second spacing placing the film of material in a strain mode characterized by a first tensile and/or compressive mode along a single film surface crystal axis across a portion of the film of material relative to the semiconductor substrate with the first structure and the first spacing; and   processing a predetermined region in the film of material to cause the first tensile and/or compressive mode to change to a second tensile and/or compressive mode.   
   
   
       41 . The method of  claim 40  wherein the portion of the film is an entirety of the film. 
   
   
       42 . The method of  claim 40  wherein the portion of the film is an entirety of a thickness of the film.