US2008150090A1PendingUtilityA1

DAMASCENE REPLACEMENT METAL GATE PROCESS WITH CONTROLLED GATE PROFILE AND LENGTH USING Si1-xGex AS SACRIFICIAL MATERIAL

Assignee: LSI LOGIC CORPPriority: Jul 13, 2004Filed: Jan 29, 2008Published: Jun 26, 2008
Est. expiryJul 13, 2024(expired)· nominal 20-yr term from priority
H10D 64/01316H10P 50/667H10P 50/268H10D 64/01326H10D 64/017
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Claims

Abstract

A method of forming a metal gate in a wafer. PolySi 1-x Ge x and polysilicon are used to form a tapered groove. Gate oxide, PolySi 1-x Ge x , and polysilicon is deposited on a wafer. A resist pattern is formed. A portion of the polysilicon, PolySi 1-x Ge x , and gate oxide is removed to provide a tapered profile. The resist is removed; a dielectric liner is deposited, and then at least a portion of the dielectric liner is removed, thereby exposing the polysilicon and leaving the dielectric liner in contact with the polysilicon, PolySi 1-x Ge x , and gate oxide. A dielectric is deposited, and a portion is removed thereby exposing the polysilicon. The polysilicon, PolySi 1-x Ge x , and gate oxide is removed from inside the dielectric liner, thereby leaving a tapered gate groove. Metal is then deposited in the groove.

Claims

exact text as granted — not AI-modified
1 . A metal gate in a wafer comprising: a groove which has a tapered profile which converges from an opening to a base; metal in the groove, thereby providing said metal gate. 
   
   
       2 . A metal gate as recited in  claim 1 , further comprising a dielectric liner on a side of said groove. 
   
   
       3 . A metal gate as recited in  claim 2 , further comprising a dielectric layer, said dielectric liner being disposed between said dielectric layer and said metal.

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