US2008149972A1PendingUtilityA1

Semiconductor device

Assignee: ISHIZAKA KATUOPriority: Sep 12, 2002Filed: Dec 11, 2007Published: Jun 26, 2008
Est. expirySep 12, 2022(expired)· nominal 20-yr term from priority
H10W 90/756H10W 72/926H10D 30/66H10D 62/155H10D 62/127
45
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Claims

Abstract

ON resistance and leakage current of a vertical power MOSFET are to be diminished. In a vertical high breakdown voltage MOSFET with unit MOSFETs (cells) arranged longitudinally and transversely over a main surface of a semiconductor substrate, the cells are made quadrangular in shape, and in each of the cells, source regions whose inner end portions are exposed to the interior of a quadrangular source contact hole are arranged separately and correspondingly to each side of the quadrangle. Each source region is trapezoidal in shape, and a lower side of the trapezoid is positioned below a gate electrode (gate insulating film), while an upper side portion of the trapezoid is exposed to the interior of the source contact hole. The four source regions are separated from one another by diagonal regions of the quadrangle.

Claims

exact text as granted — not AI-modified
1 - 16 . (canceled) 
   
   
       17 . A semiconductor device having a plurality of polygonal-shaped unit MOSFET cells connected in parallel disposed on a main surface of a semiconductor substrate, each of the polygonal-shaped unit MOSFET cells comprising:
 a gate insulating film formed on the main surface of the semiconductor substrate;   a gate electrode formed on the gate insulating film, said gate electrode having a rectangular shape in a plan view;   a drain region formed in the semiconductor substrate;   a drain electrode formed on a back surface of the semiconductor substrate, and electrically connected to the drain region;   a channel region formed over the drain region; and   a source region formed over the channel region, said source region having a rectangular shape in a plan view, and said source region is not formed under four corners of the gate electrode.

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