Shift Processing Unit

Abstract

The present invention is a technique to perform field operations. A shifter to shift an operand. A register stores the shifted operand. A shift post processor processes the shifted operand based on at least a control signal and an offset parameter.

1 . An apparatus for facilitating data processing, comprising:
 a barrel shifter configured to shift an operand during a shift cycle, whereby the barrel shifter successively provides an output operand for each shift cycle; and   a shift post processor configured to perform one of a plurality of post processing operations on a portion of a current-output operand from the barrel shifter based on a control signal.   
   
   
       2 . The apparatus of  claim 1 , wherein the shift post processor is configured to replace the portion of the current-output operand with one or more zero bits based on the control signal. 
   
   
       3 . The apparatus of  claim 1 , wherein the shift post processor is configured to replace the portion of the current-output operand with one or more sign bits based on the control signal. 
   
   
       4 . The apparatus of  claim 1 , further comprising:
 a shift carry register configured to store a current-output operand from a current shift cycle and to output a stored-output operand from a previous shift cycle.   
   
   
       5 . The apparatus of  claim 4 , wherein the shift post processor is configured to replace the portion of the current-output operand with one or more bits of the stored-output operand based on the control signal. 
   
   
       6 . A method for facilitating data processing, comprising:
 (a) shifting an operand during a shift cycle, thereby successively providing an output operand for each shift cycle; and   (b) performing one of a plurality of post processing operations on a portion of a current-output operand based on a control signal.   
   
   
       7 . The method of  claim 6 , wherein step (b) comprises:
 replacing the portion of the current-output operand with one or more zero bits based on the control signal.   
   
   
       8 . The method of  claim 6 , wherein step (b) comprises:
 replacing the portion of the current-output operand with one or more sign bits based on the control signal.   
   
   
       9 . The method of  claim 6 , further comprising:
 (c) outputting a stored-output operand from a previous shift cycle.   
   
   
       10 . The method of  claim 9 , wherein step (b) comprises:
 replacing the portion of the current-output operand with one or more bits of the stored-output operand based on the control signal.   
   
   
       11 . A processing unit comprising:
 a register file having a plurality of registers, each of the registers configured to store an operand;   an instruction decoder to decode an instruction; and   a shift processing unit coupled to the register file and the instruction decoder to perform an operation on the operand, the shift processing unit comprising:
 a barrel shifter configured to shift an operand during a shift cycle, whereby the barrel shifter successively provides an output operand for each shift cycle; and 
 a shift post processor configured to perform one of a plurality of post processing operations on a portion of a current-output operand from the barrel shifter based on a control signal. 
   
   
   
       12 . The processing unit of  claim 11 , wherein the shift post processor is configured to replace the portion of the current-output operand with one or more zero bits based on the control signal. 
   
   
       13 . The processing unit of  claim 11 , wherein the shift post processor is configured to replace the portion of the current-output operand with one or more sign bits based on the control signal. 
   
   
       14 . The processing unit of  claim 11 , further comprising:
 a shift carry register configured to store a current-output operand from a current shift cycle and to output a stored-output operand from a previous shift cycle.   
   
   
       15 . The processing unit of  claim 14 , wherein the shift post processor is configured to replace the portion of the current-output operand with one or more bits of the stored-output operand based on the control signal. 
   
   
       16 . The processing unit of  claim 11 , wherein the shift post processor is embodied in hardware description language software. 
   
   
       17 . The processing unit of  claim 16 , wherein the shift post processor is embodied in one of Verilog hardware description language software, Verilog-A hardware description language software, and VHDL hardware description language software.