Method for making electronic devices having a dielectric layer surface treatment

Abstract

A method of making an electronic device by (a) depositing a substantially nonfluorinated polymeric layer onto a dielectric layer using a plasma-based deposition technique selected from the group consisting of (i) plasma polymerizing a precursor comprising monomers, and (ii) sputtering from a target comprising one or more polymers of interpolymerized units of monomers, the monomers being selected from the group consisting of aromatic monomers, substantially hydrocarbon monomers, and combinations thereof; and (b) depositing an organic semiconductor layer adjacent to said polymeric layer.

1 . An organic electronic device comprising a substantially nonfluorinated polymeric layer on a dielectric layer and an organic semiconductor layer adjacent to said polymeric layer, said polymeric layer comprising an aromatic polymer or a substantially hydrocarbon polymer and being substantially insoluble. 
     
     
         2 . The organic electronic device of  claim 1  wherein said polymeric layer comprises interpolymerized units of monomers selected from the group consisting of naphthalene, benzene, ethyl benzene, toluene, xylene, mesitylene, styrenes, phenylacetylene, and combinations thereof. 
     
     
         3 . The organic electronic device of  claim 2  wherein said polymeric layer comprises styrenic interpolymerized units. 
     
     
         4 . The organic electronic device of  claim 3  wherein said styrenic interpolymerized units are derived from monomers selected from the group consisting of α-methylstyrene, 4-tert-butylstyrene, 2-methylstyrene, 3-methylstyrene, 4-methylstyrene, and combinations thereof. 
     
     
         5 . The organic electronic device of  claim 4  wherein said styrenic interpolymerized units are α-methylstyrene. 
     
     
         6 . The organic electronic device of  claim 1  wherein said polymeric layer is patterned, the pattern being defined by an aperture in a shadow mask. 
     
     
         7 . The organic electronic device of  claim 1  wherein said polymeric layer and said dielectric layer are integrated. 
     
     
         8 . The organic electronic device of  claim 1  wherein said device is an organic thin film transistor and said dielectric layer is a gate dielectric. 
     
     
         9 . An integrated circuit comprising the organic thin film transistor of  claim 8 .