High frequency delay circuit and test apparatus

Abstract

A high frequency delay circuit operable to output a high frequency signal delayed for a desired delay time. The high frequency delay circuit includes: a variable delay circuit operable to receive a reference signal of which a frequency is lower than the high frequency signal, and to output a delay reference signal delayed from the reference signal for the desired delay time in advance; and a multiplier operable to generate the high frequency signal, of which a frequency is a frequency of the delay reference signal multiplied by a predetermined value, and to output the generated high frequency signal at timing according to a phase of the delay reference signal.

1 .- 9 . (canceled) 
   
   
       10 . A high frequency delay circuit operable to outputs a high frequency signal delayed for a desired delay time, comprising:
 a phase comparator operable to receive a reference signal of which a frequency is lower than the high frequency signal, and to output a control voltage according to a phase difference between the reference signal and a comparison signal;   a voltage superpose section operable to output a superpose voltage, wherein the superpose voltage is the control voltage output from said phase comparator being superposed with a delay voltage according to the desired delay time;   a voltage controlled oscillator operable to generate the high frequency signal having a frequency according to the superpose voltage; and   a divider operable to divide the high frequency signal generated by said voltage controlled oscillator, to generate a signal of which a frequency is substantially the same as the frequency of the reference signal, and to input it into said phase comparator as the comparison signal.   
   
   
       11 .- 12 . (canceled) 
   
   
       13 . A test apparatus operable to test an electronic device, comprising:
 a pattern generator operable to generate a test pattern for testing the electronic device;   a high frequency delay circuit operable to generate a high frequency clock having a desired phase, of which a frequency is higher than the reference clock based on the supplied reference clock; and   a wave shaping section operable to form the test pattern according to the high frequency clock, and to supply it to the electronic device, wherein said high frequency delay circuit comprises:   a phase comparator operable to receive a reference signal of which a frequency is lower than the high frequency signal, and to output a control voltage according to a phase difference between the reference signal and a comparison signal;   a voltage superpose section operable to output a superpose voltage, wherein the superpose voltage is the control voltage output from said phase comparator being superposed with a delay voltage according to the desired delay time;   a voltage controlled oscillator operable to generate the high frequency signal having a frequency according to the superpose voltage; and   
     a divider operable to divide the high frequency signal generated by said voltage controlled oscillator, to generate a signal of which a frequency is substantially the same as the frequency of the reference signal, and to input it into said phase comparator as the comparison signal.