Integrated Circuit Memory Devices and Capacitors Having Carbon Nanotube Electrodes

Abstract

An integrated circuit capacitor includes first and second electrodes and at least one dielectric layer extending between the first and second electrodes. The first electrode includes at least one carbon nanotube. The capacitor further includes an electrically conductive catalyst material. This catalyst material may be selected from the group consisting of iron, nickel and cobalt and alloys thereof.

1 . An integrated circuit device, comprising:
 an integrated circuit capacitor having first and second electrodes and at least one dielectric layer extending between the first and second electrodes, said first electrode comprising at least two carbon nanotubes and an electrically conductive diffusion barrier layer interposed between the carbon nanotube and the dielectric layer.   
   
   
       2 . The device of  claim 1 , further comprising:
 a semiconductor substrate; and   an electrically conductive plug electrically connecting said first electrode to said semiconductor substrate.   
   
   
       3 . The device of  claim 2 , further comprising an electrically conductive catalyst material extending between said electrically conductive plug and the at least two carbon nanotubes. 
   
   
       4 . The device of  claim 3 , wherein the catalyst material is selected from the group consisting of iron, nickel and cobalt and alloys thereof. 
   
   
       5 . The device of  claim 4 , wherein said electrically conductive plug comprises a material selected from the group consisting of tungsten, titanium, tantalum and polysilicon. 
   
   
       6 . The device of  claim 2 , wherein said electrically conductive plug comprises a material selected from the group consisting of tungsten, titanium, tantalum and polysilicon. 
   
   
       7 . An integrated circuit device, comprising:
 a semiconductor substrate having a field effect transistor adjacent a surface thereof, said field effect transistor comprising source and drain regions in said semiconductor substrate and an insulated gate electrode on the surface, between the source and drain regions;   a first interlayer insulating layer on said semiconductor substrate;   a bit line on said first interlayer insulating layer;   a bit line contact plug that extends through said first interlayer insulating layer and electrically connects said bit line to the drain region;   a second interlayer insulating layer on said first interlayer insulating layer and said bit line;   a buried contact plug that extends through said first and second interlayer insulating layers and contacts the source region; and   a storage capacitor on said buried contact plug, said storage capacitor comprising a lower carbon nanotube electrode electrically connected to said buried contact plug, a dielectric layer on the lower carbon nanotube electrode and an upper electrode on the dielectric layer.   
   
   
       8 . The device of  claim 7 , further comprising an electrically conductive catalyst material extending between said buried contact plug and the lower carbon nanotube electrode. 
   
   
       9 . The device of  claim 8 , wherein the catalyst material is selected from the group consisting of iron, nickel and cobalt and alloys thereof. 
   
   
       10 . The device of  claim 9 , wherein said buried contact plug comprises a material selected from the group consisting of tungsten, titanium, tantalum and polysilicon.