US2008133993A1PendingUtilityA1
On-chip high-speed serial data analyzers, systems, and associated methods
Est. expiryDec 30, 2024(expired)· nominal 20-yr term from priority
G01R 31/31708G01R 19/2506
30
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Claims
Abstract
Some embodiments include apparatus, systems, and methods having a digital-to-analog converter (DAC) to provide at least one DAC voltage value, a comparator to compare the at least one DAC voltage value with serialized data, a sampling module including a first input coupled to an output of the comparator, a second input coupled to a clock generator, and data capture logic including an input coupled to an output of the sampling module.
Claims
exact text as granted — not AI-modified1 . An apparatus comprising:
a digital-to-analog converter (DAC) to provide at least one DAC voltage value; a comparator to compare the at least one DAC voltage value with serialized data, the comparator including an output; a sampling module including a first input coupled to the output of the comparator, a second input coupled to a clock generator, and an output; and data capture logic including an input coupled to the output of the sampling module.
2 . The apparatus according to claim 1 , wherein the sample module is responsive to the comparator to provide a plurality of samples of the serialized data.
3 . The apparatus according to claim 2 , wherein the data capture logic is to capture analysis data produced from the plurality of samples.
4 . The apparatus according to claim 3 , wherein the data capture logic includes an input to receive signal from a state machine to capture the analysis data.
5 . The apparatus according to claim 3 , wherein the data capture logic includes a counter to count a number of logical states of the plurality of samples.
6 . The apparatus according to claim 2 , wherein the least one DAC voltage value includes a number of DAC voltage values to form a plurality of time/voltage points used to provide the plurality of samples.
7 . The apparatus according to claim 6 , wherein the serialized data includes a plurality of bits positions, and wherein the number of DAC voltage values is used for each bit position of the serialized data.
8 . The apparatus according to claim 6 , wherein the number of DAC voltage values is programmable.
9 . A system comprising:
a bus; a display coupled to the bus; a processor coupled to the bus; and an integrated circuit coupled to the bus, at least one of the processor and the integrated circuit including:
a digital-to-analog converter (DAC) to provide at least one DAC voltage value;
a comparator to compare the at least one DAC voltage value with serialized data, the comparator including an output;
a sampling module including a first input coupled to the output of the comparator, a second input coupled to a clock generator, and an output; and
data capture logic including an input coupled to the output of the sampling module.
10 . The system according to claim 9 , wherein the sample module is responsive to the comparator to provide a plurality of samples of the serialized data.
11 . The system according to claim 10 , wherein the data capture logic is to capture analysis data produced from the plurality of samples.
12 . The system according to claim 10 , wherein the least one DAC voltage value includes a number of DAC voltage values to form a plurality of time/voltage points used to provide the plurality of samples.
13 . A method comprising:
receiving serialized data; providing at least one DAC voltage value; comparing the at least one DAC voltage value with the serialized data; producing analysis data from the comparing; and capturing the analysis data.
14 . The method according to claim 13 , wherein producing the analysis data includes taking a plurality of samples from the comparing, and producing the analysis data using the plurality of samples.
15 . The method according to claim 14 , wherein capturing the analysis data includes counting a number of logical states of the plurality of samples.
16 . The method according to claim 14 , wherein taking the plurality of samples includes taking each sample of the plurality of samples at a time/voltage point of a plurality of time/voltage points.
17 . The method according to claim 16 , wherein the at least one DAC voltage value includes a number of DAC voltage values, and wherein the plurality of time/voltage points are formed from the number of DAC voltage values and a number of time values.
18 . The method according to claim 17 , wherein the serialized data includes a plurality of bit positions, and wherein the number of DAC voltage values and the number of time values is used for each bit position of the plurality of bit positions.
19 . The method according to claim 16 , wherein the number of DAC voltage values and the number of time values are programmable.
20 . The method according to claim 17 , wherein the number of DAC voltage values is equal to the number of time values.Join the waitlist — get patent alerts
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