Isolated semiconductor device structures

Abstract

An array of continuous diffusion regions and continuous gate electrode structures is formed over a semiconductor substrate. Interconnecting diffusion region portions and interconnecting gate electrode portions are removed to electrically isolate transistor circuitry. The removal of interconnecting diffusion region portions and gate electrode portions can be performed sequentially, at substantially the same time, and before or after forming source/drain contacts.

1 . A semiconductor device comprising:
 a first diffusion region and a second diffusion region;   a first gate electrode and a second gate electrode; and   a first opening between the first gate electrode and the second gate electrode, wherein the first opening electrically separates the first gate electrode from the second gate electrode.   
   
   
       2 . The semiconductor device of  claim 1  further comprising a second opening between the first diffusion region and the second diffusion region, wherein the second opening electrically separates the first diffusion region from the second diffusion region. 
   
   
       3 . The semiconductor device of  claim 2  further comprising a dielectric layer overlying a first diffusion region, the second diffusion region, the first gate electrode, and the second gate electrode, wherein the first and second openings extend through the dielectric layer. 
   
   
       4 . The semiconductor device of  claim 3  further comprising a dielectric material within the first and second openings. 
   
   
       5 . The semiconductor device of  claim 1  further comprising a dielectric layer overlying a first diffusion region, the second diffusion region, the first gate electrode, and the second gate electrode, wherein the first opening extends through the dielectric layer. 
   
   
       6 . The semiconductor device of  claim 5 , further comprising a dielectric material within the first opening. 
   
   
       7 . A semiconductor device comprising:
 a first structure and a second structure, wherein the first structure is adjacent the second structure;   an opening between the first structure and the second structure, wherein the opening electrically separates the first structure from the second structure.   
   
   
       8 . The semiconductor device of  claim 7  further comprising a layer of material over the first structure and the second structure, wherein the opening extends through the layer of material.