Package substrate having embedded capacitor

Abstract

A package substrate having embedded capacitor is provided. The package substrate includes a first core circuit board, at least one embedded capacitor, a second core circuit board and a dielectric layer. At least one metal layer is disposed on a surface of the first core circuit board and at least one first conductive through hole of the first core circuit board is connected to the metal layer. The embedded capacitor is embedded in the first core circuit board and connected to the metal layer. A wiring layer is disposed on a surface of the second core circuit board and at least one second conductive through hole of the second core circuit board is connected to the wiring layer. The dielectric layer is laminated between the first and the second core circuit boards.

1 . A package substrate having embedded capacitor, comprising:
 a core circuit board having at least one wiring layer, and the core circuit board has at least one conductive through hole connected to the wiring layer;   at least one dielectric layer covering the wiring layer, and the dielectric layer has at least one conductive through hole;   at least one embedded capacitor, embedded in the dielectric layer; and   at least one metal layer covering the dielectric layer and connected to the embedded capacitor, wherein the metal layer is connected to the wiring layer through the conductive through hole.   
     
     
         2 . The package substrate of  claim 1 , wherein the at least one embedded capacitor is disposed in a location in the dielectric layer corresponding to the conductive through hole. 
     
     
         3 . The package substrate of  claim 1 , wherein the at least one wiring layer comprises a first wiring layer and a second wiring layer disposed on two opposing surface of the core circuit board. 
     
     
         4 . The package substrate of  claim 3 , wherein the at least one dielectric layer comprises a first dielectric layer and a second dielectric layer, and the first dielectric layer covers the first wiring layer and the second dielectric layer covers the second wiring layer. 
     
     
         5 . The package substrate of  claim 4 , wherein the at least one metal layer comprises a first metal layer and a second metal layer, and the first metal layer covers the first dielectric layer and the second metal layer covers the second dielectric layer. 
     
     
         6 . The package substrate of  claim 1 , further comprising a first passivation layer that covers the embedded capacitor. 
     
     
         7 . The package substrate of  claim 1 , wherein the metal layer has an opening that exposes a surface of the embedded capacitor and the package substrate further comprise a second passivation layer that covers the surface. 
     
     
         8 . The package substrate of  claim 6 , wherein the first passivation layer is made of epoxy resin or polyimide. 
     
     
         9 . The package substrate of  claim 1 , further comprising at least one surface wiring layer disposed on a surface of the package substrate, and the surface wiring layer has at least one contact electrically connected to the metal layer. 
     
     
         10 . The package substrate of  claim 9 , further comprising a solder mask layer that covers the surface wiring layer and the solder mask layer has at least one opening that exposes the contact. 
     
     
         11 . A package substrate having embedded capacitors, comprising:
 a first core circuit board having at least one metal layer, the first core circuit board has at least one first conductive through hole connected to the metal layer;   at least one embedded capacitor, embedded in the first core circuit board and connected to the metal layer;   a second core circuit board having at least one wiring layer, the second core circuit board has at least one second conductive through hole connected to the wiring layer; and   a dielectric layer, laminated between the first core circuit board and the second core circuit board.   
     
     
         12 . The package substrate of  claim 11 , wherein the at least one metal layer comprises a first metal layer and a second metal layer disposed on two opposing surfaces of the first core circuit board. 
     
     
         13 . The package substrate of  claim 11 , wherein the at least one wiring layer comprises a first wiring layer and a second wiring layer disposed on two opposing surfaces of the second core circuit board. 
     
     
         14 . The package substrate of  claim 11 , further comprising a passivation layer that covers the embedded capacitor. 
     
     
         15 . The package substrate of  claim 11 , wherein the metal layer has an opening that exposes a surface of the embedded capacitor and the package substrate further comprise a second passivation layer that covers the surface. 
     
     
         16 . The package substrate of  claim 11 , further comprising at least one conductive through hole that passes through the first core circuit board, the dielectric layer and the second core circuit board and connects the metal layer and the wiring layer. 
     
     
         17 . The package substrate of  claim 11 , further comprising at least one surface wiring layer disposed on a surface of the package substrate, the surface wiring layer has at least one contact electrically connected to the metal layer or the wiring layer. 
     
     
         18 . The package substrate of  claim 17 , further comprising a solder mask layer that covers the surface wiring layer and the solder mask layer has at least an opening that exposes the contact. 
     
     
         19 . A package substrate having embedded capacitors, comprising:
 a core circuit board having at least one metal layer, and the core circuit board has at least one conductive through hole connected to the metal layer;   at least one embedded capacitor, embedded in the core circuit board and connected to the metal layer;   at least one dielectric layer covering the core circuit board, and the dielectric layer has an embedded hole; and   at least one wiring layer covering the dielectric layer and connected to the embedded hole.   
     
     
         20 . The package substrate of  claim 19 , wherein the at least one metal layer comprises a first metal layer and a second metal layer disposed on two opposing surfaces of the core circuit board. 
     
     
         21 . The package substrate of  claim 19 , further comprising at least one through hole that passes through the core circuit board, the dielectric layer and the wiring layer and connects the metal layer and the wiring layer. 
     
     
         22 . The package substrate of  claim 19 , further comprising a first passivation layer that covers the embedded capacitor. 
     
     
         23 . The package substrate of  claim 19 , wherein the metal layer has an opening that exposes a surface of the embedded capacitor, and the package substrate further comprises a second passivation layer that covers the surface. 
     
     
         24 . The package substrate of  claim 19 , further comprising at least one surface wiring layer disposed on a surface of the package substrate, the surface wiring layer has at least one contact electrically connected to the metal layer or the wiring layer. 
     
     
         25 . The package substrate of  claim 24 , further comprising a solder mask layer that covers the surface wiring layer, and the solder mask layer has at least one opening that exposes the contact. 
     
     
         26 . A package substrate having embedded capacitors, comprising:
 a core board;   an embedded capacitor, embedded in the core board;   a first passivation layer covering the embedded capacitor; and   a metal layer covering the core board and connected to the embedded capacitor.   
     
     
         27 . The package substrate of  claim 26 , further comprising:
 at least one dielectric layer covering the metal layer, and the dielectric layer has at least one conductive through hole; and   at least one wiring layer covering the dielectric layer, and connected to the conductive through hole.   
     
     
         28 . The package substrate of  claim 27 , further comprising at least one conductive through hole that passes through the core board, the metal layer, the dielectric layer, the wiring layer and connects the metal layer and the wiring layer. 
     
     
         29 . The package substrate of  claim 26 , wherein the first passivation layer is made of epoxy resin or polyimide. 
     
     
         30 . The package substrate of  claim 26 , wherein the metal layer has an opening that exposes a surface of the embedded capacitor, and the package substrate further comprises a second passivation layer that covers the surface. 
     
     
         31 . The package substrate of  claim 30 , wherein the second passivation layer is made of epoxy resin or polyimide.