Gaming Device With Error Correcting Memory

Abstract

Systems and methods for operating a gaming machine having an ECC memory are disclosed. One aspect of the systems and methods includes providing a data store in the ECC memory. The data store may be a pool of data blocks, a file system, or a database. Critical data generated during the course of the operation of the gaming machine is stored in the data store. Errors in accessing the data in the ECC may be corrected and logged. In addition, errors in accessing the data in the ECC may cause the system to shut down.

1 . A gaming machine comprising: 
 a processor and a system memory;    an ECC (Error Correcting Code) memory providing a data store;    a gaming application executable by the processor and operable to store critical data in the data store.    
   
   
       2 . The gaming machine of  claim 1 , and further comprising a data store manager to maintain the data store.  
   
   
       3 . The gaming machine of  claim 2 , wherein the data store manager comprises a file system component and wherein the data store comprises a file system.  
   
   
       4 . The gaming machine of  claim 2 , wherein the data store manager comprises a database manager and wherein the data store comprises a database maintained by the database manager.  
   
   
       5 . The gaming machine of  claim 4 , wherein the database comprises a relational database.  
   
   
       6 . The gaming machine of  claim 4 , wherein the database comprises an object oriented database.  
   
   
       7 . The gaming machine of  claim 4 , wherein the database comprises a hierarchical database.  
   
   
       8 . The gaming machine of  claim 1 , wherein a plurality of data stores are maintained in the ECC Memory.  
   
   
       9 . The gaming machine of  claim 8 , wherein at least two of the plurality of data stores have differing types.  
   
   
       10 . The gaming machine of  claim 1 , wherein the ECC memory is non-volatile.  
   
   
       11 . The gaming machine of  claim 1 , wherein the ECC memory comprises a read-only memory.  
   
   
       12 . A computer-implemented method for operating a gaming machine, the method comprising: 
 providing an ECC memory for the gaming machine; and    accessing the ECC memory;    receiving a notification of an ECC error in response to the access; and    initiating an action in response to the notification.    
   
   
       13 . The computer-implemented method of  claim 12 , wherein the ECC error comprises a single bit error and wherein the action comprises logging the error.  
   
   
       14 . The computer-implemented method of  claim 12 , wherein the ECC error comprises a multiple bit error and wherein the action comprises initiating a shutdown of the gaming machine.  
   
   
       15 . The computer-implemented method of  claim 12 , wherein the ECC error comprises a multiple bit error and wherein the action comprises initiating marking a portion of the ECC memory.  
   
   
       16 . The computer-implemented method of  claim 12 , wherein the ECC error comprises a multiple bit error and wherein the action comprises retrying the access to the ECC memory.  
   
   
       17 . The computer-implemented method of  claim 12 , wherein accessing the ECC memory comprises storing critical data in the ECC memory.  
   
   
       18 . A computer-readable medium having computer executable instructions for performing a method for operating a gaming machine, the method comprising: 
 accessing an ECC memory on a gaming machine;    receiving a notification of an ECC error in response to the access; and    initiating an action in response to the notification.    
   
   
       19 . The computer-readable medium of  claim 18 , wherein the ECC error comprises a single bit error and wherein the action comprises logging the error.  
   
   
       20 . The computer-readable medium of  claim 18 , wherein the ECC error comprises a multiple bit error and wherein the action comprises initiating a shutdown of the gaming machine.  
   
   
       21 . The computer-readable medium of  claim 18 , wherein the ECC error comprises a multiple bit error and wherein the action comprises initiating marking a portion of the ECC memory.  
   
   
       22 . The computer-readable medium of  claim 18 , wherein the ECC error comprises a multiple bit error and wherein the action comprises retrying the access to the ECC memory.  
   
   
       23 . The computer-readable medium of  claim 18 , wherein accessing the ECC memory comprises storing critical data in the ECC memory.