Electronic component package with EMI shielding

Abstract

An electronic component package having an EMI shielded space is disclosed. The package comprises a substrate having an electronic component located on its surface and a conductive enclosure having a top and downwardly extending sides enclosing the component and defining a shielded space. A vent opening is provided through the substrate and is located in the shielded space for venting the shielded space. A second vent opening may be provided in the top of the conductive enclosure.

1 . An electronic component package having an EMI shielded component, comprising:
 a substrate having a mounting area for an electronic component,   an electronic component located on the mounting area,   a conductive enclosure having a top and downwardly extending sides enclosing the mounting area and defining a shielded space above the mounting area, and   a vent opening extending through the substrate, the opening located in the mounting area for venting the shielded space.   
   
   
       2 . The component package of  claim 1  wherein the vent opening extending through the substrate is a plated via. 
   
   
       3 . The component package of  claim 1  wherein the component is covered with an encapsulant and the vent opening extending through the substrate is not covered with the encapsulant. 
   
   
       4 . The component package of  claim 1  further including a second vent opening in the top of the conductive enclosure. 
   
   
       5 . The component package of  claim 4  wherein the top and sides of the conductive enclosure do not have any further openings. 
   
   
       6 . The component package of  claim 4  wherein portions of the substrate and conductive enclosure are covered with an encapsulant and the second vent opening is not covered with the encapsulant. 
   
   
       7 . The component package of  claim 6  wherein the top of the conductive enclosure is not covered with the encapsulant. 
   
   
       8 . The component package of  claim 1  wherein the substrate includes a ground trace, or other grounding means, and the sides of the conductive enclosure make contact with the ground trace or plane. 
   
   
       9 . The component package of  claim 1  wherein the component is a semiconductor die. 
   
   
       10 . The component package of  claim 9  wherein the semiconductor die is a radio frequency (RF) chip. 
   
   
       11 . The component package of  claim 1  wherein the conductive enclosure is adapted to attenuate electromagnetic radiation emitted by the component. 
   
   
       12 . The component package of  claim 1  which is a semiconductor chip package. 
   
   
       13 . A method of making an electronic component package, comprising steps of:
 providing a substrate having a mounting area for an electronic component and a vent opening extending through the substrate adjacent the mounting area,   mounting a component on the mounting area of the substrate, and   locating a conductive enclosure on the substrate to surround the component and the vent opening.   
   
   
       14 . The method of  claim 13  wherein before performing the step of locating a conductive enclosure on the substrate performing a further step of covering the component with an encapsulant and not covering the vent opening with the encapsulant. 
   
   
       15 . The method of  claim 13  wherein locating a conductive enclosure on the substrate includes providing a conductive enclosure having a top and downwardly extending sides and a second vent opening in the top. 
   
   
       16 . The method of  claim 15  including a further step of covering portions of the substrate and the conductive enclosure with an encapsulant and not covering the second vent opening with the encapsulant. 
   
   
       17 . The method of  claim 13  wherein mounting a component on the mounting area includes mounting a semiconductor die on the mounting area, the die having an active surface, and covering at least the active surface of the die with an encapsulant. 
   
   
       18 . The method of  claim 17  wherein covering the active surface of the die with an encapsulant includes one of an overmolding procedure, a glob-top procedure or a dam and fill procedure. 
   
   
       19 . The method of  claim 13  wherein providing a substrate having a mounting area for an electronic component and a vent opening includes during a step of preparing the substrate drilling a hole having a hole wall extending through the substrate and plating the hole wall. 
   
   
       20 . A semiconductor chip package comprising:
 a substrate having a surface provided with an electronic circuit,   a semiconductor die mounted on the surface and connected with the electronic circuit,   a shielding enclosure located over the semiconductor die and defining a shielded space surrounding the semiconductor die,   a vent opening extending through the substrate, the opening located within the shielded space for venting the shielded space.   
   
   
       21 . The semiconductor chip package of  claim 20  further including a second vent opening in the conductive enclosure, and wherein the surface of the substrate is covered with an encapsulant that surrounds the shielding enclosure but does not cover the second vent opening.