US2008063872A1PendingUtilityA1

Treatment of semiconductor wafers

Assignee: SOITEC SILICON ON INSULATORPriority: Apr 15, 2005Filed: Nov 13, 2007Published: Mar 13, 2008
Est. expiryApr 15, 2025(expired)· nominal 20-yr term from priority
H10W 10/181H10P 90/1916H10P 70/15H10P 52/00Y10T428/31515
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Claims

Abstract

A semiconductor wafer having a surface layer of semiconductor material that exhibits a reduced number of defects. This feature is achieved by a treatment method wherein the surface layer undergoes a chemical-mechanical polishing step, an intermediate step of cleaning the surface of the surface layer of semiconductor material using an SC1 solution, and then an RCA cleaning step.

Claims

exact text as granted — not AI-modified
1 . A wafer having at least a surface layer of a semiconductor material, with the surface layer having a thickness of less than 1000 Å, a roughness of less than 2.5 Å rms for a scan area of 2 μm×2 μm, and a HF defect density of less than 0.5/cm 2 .  
     
     
         2 . The wafer of  claim 1 , which has a HF defect density of less than 0.1/cm 2 .  
     
     
         3 . The wafer of  claim 1 , wherein the surface layer of semiconductor material is made of silicon or silicon germanium and the wafer is a silicon on insulator structure or a silicon-germanium on insulator structure.  
     
     
         4 . The wafer of  claim 3 , wherein the surface layer of semiconductor material is made of silicon.  
     
     
         5 . The wafer of  claim 3 , wherein the surface layer of semiconductor material is made of silicon germanium.  
     
     
         6 . The wafer of  claim 3 , wherein the wafer is a silicon on insulator structure.  
     
     
         7 . The wafer of  claim 3 , wherein the wafer is a silicon-germanium on insulator structure.

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