Low dielectric constant film produced from silicon compounds comprising silicon-carbon bond
Abstract
A method and apparatus for depositing a low dielectric constant film by reaction of an organo silane compound and an oxidizing gas. The oxidized organo silane film has excellent barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organo silane film can also be used as an etch stop or an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organo silane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organo silane film is produced by reaction of methyl silane, CH 3 SiH 3 , and N 2 O.
Claims
exact text as granted — not AI-modified1 . An integrated circuit structure, comprising:
regions of dielectric material separating regions of conductive material within a layer, wherein the regions of dielectric material comprise: a first dielectric material comprising a porous low k dielectric material; and a second dielectric material comprising silicon, oxygen, and carbon, wherein the second dielectric material forms a low k lining layer between the first dielectric material and the regions of conductive material.
2 . The integrated circuit structure of claim 1 , wherein the first dielectric material is a spin-on porous silicon oxide.
3 . The integrated circuit structure of claim 1 , further comprising a cap layer on the first dielectric material, the cap layer comprising the second dielectric material.
4 . An integrated circuit structure, comprising:
regions of dielectric material separating regions of conductive material, wherein the regions of dielectric material comprise: a first dielectric material comprising a porous low k dielectric material; a second dielectric material comprising silicon, oxygen, and carbon, wherein the second dielectric material forms a cap layer on the first dielectric material.
5 . The integrated circuit structure of claim 4 , wherein the first dielectric material is a spin-on porous silicon oxide.
6 . The integrated circuit structure of claim 4 , further comprising a lining layer between the first dielectric material and the regions of conductive material, wherein the lining layer comprises the second dielectric material.Join the waitlist — get patent alerts
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