Semiconductor device and method of manufacturing the same

Abstract

A semiconductor device includes a word line structure that extends in a first direction on an active region defined on a substrate. First and second contact pads are formed on the active region at both sides of the word line structure. Bit line structures are electrically connected to the first contact pad and extend in a second direction substantially perpendicular to the first direction. An insulation layer structure is formed on the substrate having the bit line structures. A storage node contact plug is electrically connected to the second contact pad through the insulation layer structure. A storage node electrode, which may be part of a capacitor, is formed on the storage node contact plug. The storage node contact plug has a lower portion and an upper portion having a width wider than that of the lower portion, with vertical sides perpendicular to the first and second directions.

1 . A semiconductor device comprising: 
 word line structures extending in a first direction on a substrate of which an active region is defined, the word line structures traversing the active region;    first and second contact pads respectively formed on the active region at both sides of the word line structures;    bit line structures having contact with the first contact pad and extending in a second direction substantially perpendicular to the first direction;    an insulation layer structure formed on the substrate having the bit line structures;    storage node contact plugs formed through the insulating layer structure between the bit line structures and having contact with the second contact pad, the storage node contact plugs having a lower portion and an upper portion wider than the lower portion, and the upper portion of the storage node contact plugs extending in the second direction and having side face perpendicular to the first direction; and    storage node electrodes formed on the storage node contact plugs.    
   
   
       2 . The semiconductor device of  claim 1 , wherein the insulation layer structure comprises: 
 a first insulating interlayer pattern partially filling a lower space between the bit line structures;    an etching stop layer pattern formed on sidewalls of the bit line structures exposed by the first insulating interlayer pattern; and    a second insulating interlayer pattern formed on the etching stop layer pattern to partially fill an upper space between the bit line structures that is positioned over the lower space.    
   
   
       3 . The semiconductor device of  claim 2 , wherein the etching stop layer pattern comprises silicon nitride.  
   
   
       4 . The semiconductor device of  claim 1 , wherein the storage node electrodes correspond to the storage node contact plug, respectively, the storage node electrodes being arranged in a zigzag pattern so that a line connected between adjacent storage node electrodes are diagonal to the first and second directions.  
   
   
       5 . The semiconductor device of  claim 1 , wherein the storage node contact plugs comprise doped polysilicon.