US2008048729A1PendingUtilityA1
Comparator Circuit and Method for Operating a Comparator Circuit
Est. expiryJul 25, 2026(expired)· nominal 20-yr term from priority
Inventors:Sebastian Ehrenreich
G03F 7/70516
54
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Claims
Abstract
A comparator circuit for comparing a first voltage signal to a second voltage signal is described. The comparator circuit includes a first comparator and a second comparator and a selection unit for selecting one of the comparators depending on a selection condition. The invention also provides a method for operating a comparator circuit.
Claims
exact text as granted — not AI-modified1 . A comparator circuit for comparing a first voltage signal to a second voltage signal comprising a first comparator and a second comparator and a selection unit for selecting one of the comparators depending on a selection condition.
2 . The comparator circuit according to claim 1 , wherein the selection condition is the input voltage signal being one of above and below a threshold voltage.
3 . The comparator circuit according to claim 2 , wherein the selection unit selects the first comparator if the input voltage signal is above the threshold voltage, and further wherein the selection unit selects the second comparator if the input voltage signal is below the threshold voltage.
4 . The comparator circuit according to claim 1 , wherein at least one of the first and the second comparators is a pMOS-transistor based device adapted for a first input voltage range and the other one of the comparators is an nMOS-transistor based device adapted for a second input voltage range.
5 . The comparator circuit according to claim 1 , wherein the selection unit comprises a selection output port, wherein the selection unit connects an output port of at least one of the first comparator and the second comparator to the selection output port depending on the selection condition.
6 . The comparator circuit according claim 1 , wherein the selection unit comprises means for adjusting a reference voltage.
7 . The comparator circuit according to claim 2 , wherein the selection unit comprises means for adjusting the threshold voltage.
8 . The comparator circuit according to claim 7 , wherein the means comprises a voltage divider and a third comparator with an input port for the threshold voltage and an output port for a selection signal.
9 . The comparator circuit according to claim 8 , wherein the third comparator comprises an input port for a voltage signal which is also applied to at least one of the first and the second comparators.
10 . The comparator circuit according to claims 9 , wherein the selection unit comprises a multiplexor having an output port, wherein the output port of the multiplexor is selectively connectable to the output ports of at least one of the first, the second and the third comparator via the selection unit.
11 . The comparator circuit according to claim 1 , wherein the first and the second comparators are assigned to a comparator stage of an analog-to-digital converter.
12 . The comparator circuit according to claim 11 , wherein a sample-and-hold unit is assigned to each of the first and the second comparators.
13 . The comparator circuit according to claim 11 , wherein the analog-to-digital converter is of a successive-approximation type.
14 . The comparator circuit according to claim 1 , wherein at least one of the first and second comparators is a single-rail-type unit.
15 . The comparator circuit according to claim 1 , wherein at least one of the first and second comparators is a latch-type device.
16 . A method for operating a comparator circuit, comprising comparing a first voltage signal with a second voltage signal, wherein at least one of a first comparator and a second comparator is selected depending on a selection condition.
17 . The method according to claim 16 , wherein the most accurate one of the first and the second comparators is selected depending on the threshold voltage.
18 . The method according to claim 17 , wherein an nMOS-based comparator is selected if a voltage level is above the threshold voltage and a pMOS-based comparator is selected if the voltage level is below the threshold voltage.
19 . The method according to claim 18 , wherein an analog-to-digital conversion is made, wherein in the beginning of the conversion at least one of the first and the second comparators is chosen depending on the threshold voltage.
20 . The method according to claim 19 , wherein the beginning of the successive approximation analog-to-digital conversion the selection of at least one of the first and the second comparators and a first analog-to-digital conversion is performed in the same step.Join the waitlist — get patent alerts
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