Methods For Running Priority-Based Application Threads On A Realtime Component
Abstract
Systems and methods for processing priority-based application threads on a realtime component are described. A mixing component submits blank buffers to the realtime component. The mixing component receives application thread data according to a priority-based schedule and writes the data using a second real-time thread to the buffers before the buffers into which the data is written are processed. Buffers are created on memory page boundaries with an offset into the memory page such that the least significant bits of a virtual memory address referencing the memory page can be used as an index into a circular buffer queue to determine which buffer is currently being processed. When writing into a buffer, a buffer that is a predetermined range of buffers behind the buffer currently being processed is used.
Claims
exact text as granted — not AI-modified1 . A method for processing data from one or more priority-scheduled components with a realtime component, comprising:
creating at least a first buffer and a second buffer; each buffer being empty; submitting the empty buffers to hardware in a buffer queue, the first buffer preceding the second buffer; receiving data from the priority-scheduled component to be processed by the realtime component; processing the received data in the realtime component; and writing realtime component output data to the first buffer before the first buffer is processed by the hardware, so that when the hardware processes the first buffer, the first buffer is not empty.
2 . The method as recited in claim 1 , further comprising:
clearing a buffer after the buffer has been processed by the hardware; and resubmitting the cleared buffer in the buffer queue, thereby creating a circular buffer queue.
3 . The method as recited in claim 1 , further comprising creating each buffer so that each buffer can be identified by a unique offset from a memory page boundary.
4 . The method as recited in claim 3 , wherein the beginning of each buffer is offset a number of bytes into a memory page from the memory page boundary, so that the low order bits of the address of the start of a buffer uniquely identify the buffer.
5 . The method as recited in claim 4 , wherein the number of bytes comprising the offset for a buffer is a function of the buffer's position in the buffer queue.
6 . The method as recited in claim 4 , wherein the number of bytes comprising the offset is a power of 2.
7 . The method as recited in claim 1 , wherein the writing the realtime component output data further comprises:
tracking which buffer is currently being processed by the hardware; and writing the data to a buffer other than the buffer that is currently being processed by the hardware.
8 . The method as recited in claim 7 , wherein:
the creating at least a first buffer and a second buffer further comprises creating multiple buffers so that each successive buffer is offset from a memory page boundary by a fixed number of bytes more than the previously created buffer; and the tracking further comprises identifying the buffer currently being processed by the hardware from the least significant bits of a virtual or physical address of the start of that buffer.
9 . The method as recited in claim 8 , wherein:
the fixed number of bytes further comprises a power of 2; and the number of least significant bits of a memory address used to identify the buffer currently being processed by the hardware is a function of a size of the memory page in bytes.Join the waitlist — get patent alerts
Track US2008046893A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.