Overriding processor configuration settings

Abstract

In one embodiment, the present invention includes a method for setting an entry in an override register corresponding to a processor feature to override a processor configuration setting for the processor feature and overriding the processor configuration setting for the processor feature using the entry. The entry may be set with a user-level application, for example.

1 . An apparatus comprising: 
 a processor configuration register to store a default setting for at least one processor feature;    a first register to store first override information to enable the at least one processor feature;    a second register to store second override information to disable the at least one processor feature; and    control logic to couple corresponding entries of the processor configuration register, the first register, and the second register.    
   
   
       2 . The apparatus of  claim 1 , wherein the control logic is to output a control signal to enable or disable the at least one processor feature based on a state of the corresponding entries of the processor configuration register, the first register and the second register.  
   
   
       3 . The apparatus of  claim 2 , wherein the first register and the second register are to store the first override information and the second override information, respectively, under user level software.  
   
   
       4 . The apparatus of  claim 1 , wherein the first register includes a plurality of entries each to store first override information for a processor feature.  
   
   
       5 . The apparatus of  claim 4 , wherein the second register includes a plurality of entries each to store second override information for a processor feature.  
   
   
       6 . The apparatus of  claim 5 , further comprising a hardware unit to generate a reset signal to reset an entry of the first register, wherein the first entry is set by software.  
   
   
       7 . The apparatus of  claim 1 , wherein the first register is to override a disabled default setting of the at least one processor feature and the second register is to override an enabled default setting of the at least one processor feature.  
   
   
       8 . A system comprising: 
 a processor including a first register to store a plurality of first bits, each of the first bits corresponding to a default setting for a processor feature, a second register to store a plurality of second bits, at least one of the second bits to override the corresponding default setting to an enabled state, and a third register to store a plurality of third bits, at least one of the third bits to override the corresponding default setting to a disabled state; and    a memory coupled to the processor.    
   
   
       9 . The system of  claim 8 , wherein the plurality of second bits are to be written by user level software.  
   
   
       10 . The system of  claim 9 , further comprising a hardware prefetcher, wherein the hardware prefetcher is to reset a value of one of the plurality of second bits to override the value written by the user level software.  
   
   
       11 . The system of  claim 8 , wherein the processor includes logic to receive corresponding ones of the first, second and third bits and to generate an output therefrom, wherein the output is to override the default setting for the corresponding processor feature.  
   
   
       12 . The system of  claim 11 , wherein the processor includes a state storage to store the plurality of first bits, the plurality of second bits and the plurality of third bits on a context switch.  
   
   
       13 . The system of  claim 8 , wherein corresponding ones of the first, second and third bits are associated with a processor feature corresponding to a hardware prefetcher.  
   
   
       14 . A method comprising: 
 setting an entry corresponding to a first processor feature in a first override register, the first override register to store entries to override a processor configuration setting for corresponding processor features to an enabled state, and setting an entry corresponding to the first processor feature in a second override register, the second override register to store entries to override a processor configuration setting for corresponding processor features to a disabled state, the processor configuration setting stored in a configuration register; and    overriding the processor configuration setting for the first processor feature using the entries in the first override register and the second override register.    
   
   
       15 . The method of  claim 14 , further comprising setting the entries during a first portion of a program and resetting the entries during a second portion of the program under user control.  
   
   
       16 . The method of  claim 15 , further comprising storing the entries in the first and second override registers upon a context switch from a first context to a second context and loading values associated with a processor state of the second context into the first and second override registers.  
   
   
       17 . The method of  claim 16 , further comprising setting the entries based on dynamic profiling of a program.  
   
   
       18 . The method of  claim 14 , further comprising logically combining the entry of the first override register and the processor configuration setting of the configuration register to obtain a first value and logically combining the first value and the entry of the second override register to override the processor configuration setting.  
   
   
       19 . The method of  claim 18 , further comprising overriding the entry in the first override register under hardware control after setting the entry with user level software.  
   
   
       20 . The method of  claim 14 , wherein overriding the processor configuration setting comprises performing a first logical operation between the entry in the first override register and a corresponding entry in the processor configuration register and performing a second logical operation between the entry in the second override register and a result of the first logical operation.