Operation-processing device, method for constructing the same, and operation-processing system and method

Abstract

As shown in FIG. 1 , an operation-processing device of the present invention comprises a register array ( 11 ) having plural registers for holding an arbitrary value based on a write address Aw and a write control signal Sw and outputting this value based on a read address Ar, an ALU ( 12 ) for performing operations on this value, a decoder ( 13 ) for decoding an operation instruction from an operation program AP for operating this ALU ( 12 ), and an instruction-execution-controlling portion ( 50 ) for controlling the register array ( 11 ) and the ALU ( 12 ) in order to execute this operation instruction, wherein this instruction-execution-controlling portion ( 50 ) selects one of the registers based on the operation instruction and performs register-to-register addressing processing that, based on a value held by this selected register, selects another register.

1 - 5 . (canceled)  
     
     
         6 . A constructing method for constructing a device for performing operation processing based on an arbitrary operation program, said method comprising the steps of: 
 forming plural memory cells and arithmetic/logic operation elements on the same semiconductor chip beforehand;    combining said memory cells to define a register array and a read only memory and combining said arithmetic/logic operation elements to define an operation portion, an instruction-decoding portion, and an instruction-execution-controlling portion; and    connecting said register array, the read only memory, the operation portion, the instruction-decoding portion, and the instruction-execution-controlling portion to each other based on preset wiring information and writing an arbitrary operation program to said read only memory.    
     
     
         7 . The constructing method for constructing an operation-processing device according to  claim 6 , wherein said operation program includes operation instruction to perform the register-to-register addressing processing.  
     
     
         8 . The constructing method for constructing an operation-processing device according to  claim 6 , comprising the steps of: 
 providing a rewritable nonvolatile storage device for storing said wiring information;    upon power application, reading the wiring information from said storage device; and    based on said set wiring information, interconnecting the register array, the read only memory, the operation portion, the instruction-decoding portion, and the instruction-execution-controlling portion.    
     
     
         9 . The constructing method for constructing an operation-processing device according to  claim 6 , wherein the wiring information stored in said storage device is rewritten on demand in accordance with functions of the operation-processing device.  
     
     
         10 . The constructing method for constructing an operation-processing device according to  claim 6 , wherein said register array has plural registers each for holding an arbitrary value based on a write address and a write control signal and outputting this value based on a read address.  
     
     
         11 . The constructing method for constructing an operation-processing device according to  claim 6 , wherein said instruction-execution-controlling portion selects one of said registers based on said operation instruction; and 
 wherein based on a value held by said selected register, said instruction-execution-controlling portion performs register-to-register addressing processing for selecting another register.    
     
     
         12 . The constructing method for constructing an operation-processing device according to  claim 6 , wherein said instruction-execution-controlling portion comprises: 
 a first selector for selecting any one of a read execution address to select said one register and a read address to select this register again; and    a second selector for selecting any one of a write execution address to select said one register and a write address to select this register again.    
     
     
         13 . The constructing method for constructing an operation-processing device according to  claim 6 , wherein said operation portion performs operation on a value read from said register array; 
 wherein said instruction-decoding portion decodes an operation instruction from on an operation program for operating said operation portion; and    wherein said instruction-execution-controlling portion controls said register array and the operation portion in order to execute the operation instruction decoded by said instruction-decoding portion.    
     
     
         14 - 25 . (canceled)