Semiconductor memory device with data bus scheme for reducing high frequency noise

Abstract

A semiconductor memory device includes memory modules which have memories and a data bus which transfers data to the memory modules, in which the data bus comprises a low frequency band data pass unit which removes the high frequency component of the data and sends the data to the memory modules. The low frequency band data pass unit comprises a plurality of stubs which are connected to the data bus in parallel and are formed as printed circuit board (PCB) patterns. The low frequency band data pass unit comprises a plurality of plates that are connected to the data bus in parallel and are formed as PCB patterns. The low frequency band data pass unit has a shape in which parts having a wide width and parts having a narrow width are alternately connected. Therefore, without adding a separate passive device, the semiconductor memory device reduces the high frequency noise of data transferred through a data bus such that the voltage margin of the data improves, the cost for passive devices such as capacitors, is reduced, and the process for attaching the passive devices is simplified.

1 . A semiconductor memory device comprising: 
 memory modules which have memories; and    a data bus which transfers data to the memory modules, wherein the data bus includes a printed circuit board (PCB) pattern configured as a low frequency band data pass unit adapted to send the data to the memory modules and to remove a high frequency component of the data.    
   
   
       2 . The semiconductor memory device of  claim 1 , wherein the PCB pattern includes a plurality of stubs which are arranged in parallel.  
   
   
       3 . The semiconductor memory device of  claim 2 , wherein one end of each of the stubs is open.  
   
   
       4 . The semiconductor memory device of  claim 1 , wherein the PCB pattern includes a plurality of plates that are arranged in parallel.  
   
   
       5 . The semiconductor memory device of  claim 4 , wherein the data bus further includes through-lines, and wherein PCB pattern further includes connection lines which connect the plates to the through-lines.  
   
   
       6 . The semiconductor memory device of  claim 1 , wherein the PCB pattern has a shape in which parts having a first width and parts having a second width are alternately connected, where the first width is greater than the second width.  
   
   
       7 . The semiconductor memory device of  claim 1 , wherein the PCB pattern has a shape in which line parts having high impedance and line parts having low impedance are alternately connected.  
   
   
       8 . A semiconductor memory device comprising: 
 memory modules which have memories; and    a data bus which transfers data to the memory modules, wherein the data bus includes a low frequency band data pass unit adapted to send the data to the memory modules and to remove a high frequency component of the data.    
   
   
       9 . The semiconductor memory device of  claim 8 , wherein the low frequency band data pass unit includes a plurality of stubs which are arranged in parallel.  
   
   
       10 . The semiconductor memory device of  claim 9 , wherein one end of each of the stubs is open.  
   
   
       11 . The semiconductor memory device of  claim 8 , further comprising a printed circuit board (PCB) pattern which at least partially defines the low frequency band data pass unit.