Controller for a decorative lighting system

Abstract

A decorative lighting system includes a command controller, a plurality of illumination devices and a flexible cord interconnecting each. The command controller includes a microcontroller that provides a data signal and a clock signal. The data signal instructs a plurality of addresses corresponding to the lighting devices. Each illumination device has at least three light emitting diodes (LEDs). The LEDs each emit light at a different wavelength than either of the other LEDs. An integrated circuit LED is responsive to the data signal, clock signal, and power signal and drives the first, second, and third LEDs by to a blink rate and intensity. The LED driver includes a plurality of pulse width modulation registers that are selectable in combination to drive the LEDs to a blink rate and intensity independent of one another.

1 . An apparatus comprising: 
 a controller configured to provide a data signal and a clock signal, the controller being electrically connectable to a bus comprising at least two conductors configured to carry the data signal and the clock signal from the controller to a driver electrically connected to the bus, wherein the controller is configured to provide the data signal and the clock signal to the driver for driving first, second and third light emitting diodes (LEDs) electrically connected to the driver, each of the first, second and third LEDs being configured to emit light at a different wavelength than either of the other LEDs, wherein the driver comprises a plurality of pulse width modulation registers selectable in combination to drive the first, second and third LEDs independent of one another to a blink rate and an intensity to control the color produced by the combination of the LEDs.    
   
   
       2 . The apparatus according to  claim 1 , wherein the controller is configured to provide the data signal and the clock signal to the driver further comprising a brightness register configured to interconnect the plurality of pulse with modulation registers to one or more of the LEDs for controlling a brightness of the respective one or more of the LEDs by adjusting a duty cycle of current supplied thereto.  
   
   
       3 . The apparatus according to  claim 1 , wherein the controller is configured to provide the data signal and the clock signal to the driver further comprising an LED select register for controlling the selection in combination of the plurality of pulse width modulation registers.  
   
   
       4 . The apparatus according to  claim 1 , wherein the controller is configured to provide the data signal and the clock signal to the driver further comprising first, second and third field-effect transistor gates interconnected to respective ones of the plurality of pulse width modulation registers, the first, second and third field-effect transistor gates being configured to gate current to respective ones of the first, second and third LEDs.  
   
   
       5 . The apparatus according to  claim 1 , wherein the controller is configured to provide the data signal and the clock signal according to an inter-integrated circuit protocol (I 2 C).  
   
   
       6 . The apparatus according to  claim 1 , wherein the controller is configured to provide the data signal including one or more instructions related to one or more addresses, the driver being responsive to the data signal including an address of the driver.  
   
   
       7 . The apparatus according to  claim 6 , wherein the controller is configured to provide the data signal and the clock signal to a plurality of drivers, at least one driver having an address at least a portion of which is common to an address of each of one or more other drivers such that the driver and respective one or more other drivers are responsive to the data signal from the controller upon receiving, in the data signal, an address including the common portion.  
   
   
       8 . The apparatus according to  claim 1 , wherein the controller is configured to provide the data signal and the clock signal to a modulator for modulating a power signal according to the data signal and the clock signal, the bus comprising at least two conductors configured to carry the modulated power signal.  
   
   
       9 . The apparatus according to  claim 1 , wherein the controller is configured to provide the data signal and the clock signal to the driver comprising the plurality of pulse width modulation registers selectable in combination to logarithmically drive the first, second and third LEDs.  
   
   
       10 . An apparatus comprising: 
 a controller configured to provide signals to a driver according to an inter-integrated circuit protocol (I 2 C), wherein the controller is configured to provide the I 2 C signals to the driver for driving first, second and third light emitting diodes (LEDs) electrically connected to the driver, each of the first, second and third LEDs being configured to emit light at a different wavelength than either of the other LEDs, wherein the driver comprises a plurality of pulse width modulation registers selectable in combination to drive the first, second and third LEDs independent of one another to a blink rate and an intensity to control the color produced by the combination of the LEDs.    
   
   
       11 . The apparatus according to  claim 10 , wherein the controller is configured to provide the I 2 C signals to the driver further comprising a brightness register configured to interconnect the plurality of pulse with modulation registers to one or more of the LEDs for controlling a brightness of the respective one or more of the LEDs by adjusting a duty cycle of current supplied thereto.  
   
   
       12 . The apparatus according to  claim 10 , wherein the controller is configured to provide the I 2 C signals to the driver further comprising an LED select register for controlling the selection in combination of the plurality of pulse width modulation registers.  
   
   
       13 . The apparatus according to  claim 10 , wherein the controller is configured to provide the I 2 C signals to the driver further comprising first, second and third field-effect transistor gates interconnected to respective ones of the plurality of pulse width modulation registers, the first, second and third field-effect transistor gates being configured to gate current to respective ones of the first, second and third LEDs.  
   
   
       14 . The apparatus according to  claim 10 , wherein the controller is configured to provide the I 2 C signals including one or more instructions related to one or more addresses, the driver being responsive to the I 2 C signals including an address of the driver.  
   
   
       15 . The apparatus according to  claim 14 , wherein the controller is configured to provide the I 2 C signals to a plurality of drivers, at least one driver having an address at least a portion of which is common to an address of each of one or more other drivers such that the driver and respective one or more other drivers are responsive to the I 2 C signals from the controller upon receiving, in the I 2 C signals, an address including the common portion.  
   
   
       16 . The apparatus according to  claim 10 , wherein the controller is configured to provide the I 2 C signals via a bus configured to carry the I 2 C signals from the controller to the driver electrically connected to the bus, wherein the I 2 C signals comprise a data signal and a clock signal, and wherein controller is configured to provide the data signal and the clock signal to a modulator for modulating a power signal according to the data signal and the clock signal, the bus comprising at least two conductors configured to carry the modulated power signal.  
   
   
       17 . The apparatus according to  claim 10 , wherein the controller is configured to provide the I 2 C signals to the driver comprising the plurality of pulse width modulation registers selectable in combination to logarithmically drive the first, second and third LEDs.  
   
   
       18 . An apparatus configured to provide a data signal and a clock signal to a plurality of drivers via a bus comprising at least two conductors for carrying the data signal and the clock signal, wherein for each of the drivers, the apparatus is configured to provide the data signal and the clock signal for driving first, second and third light emitting diodes (LEDs) electrically connected to the respective driver, each of the first, second and third LEDs of each driver being configured to emit light at a different wavelength than either of the other LEDs of the respective driver, wherein each driver comprises a plurality of pulse width modulation registers selectable in combination to drive the first, second and third LEDs of the respective driver independent of one another to a blink rate and an intensity to control the color produced by the combination of the LEDs of the respective driver.  
   
   
       19 . The apparatus according to  claim 18  configured to provide the data signal and the clock signal to the plurality of drivers each of which further comprises a brightness register, the brightness register of each driver being configured to interconnect the plurality of pulse with modulation registers of the respective driver to one or more of the LEDs electrically connected to the respective driver for controlling a brightness of the respective one or more of the LEDs by adjusting a duty cycle of current supplied thereto.  
   
   
       20 . The apparatus according to  claim 18  configured to provide the data signal and the clock signal to the plurality of drivers each of which further comprises an LED select register, the LED select register of each driver being configured to control the selection in combination of the plurality of pulse width modulation registers of the respective driver.  
   
   
       21 . The apparatus according to  claim 18  configured to provide the data signal and the clock signal to the plurality of drivers each of which further comprises first, second and third field-effect transistor gates, the first, second and third field-effect transistor gates of each driver being electrically connected to respective ones of the plurality of pulse width modulation registers of the respective driver, the first, second and third field-effect transistor gates of each driver being configured to gate current to respective ones of the first, second and third LEDs electrically connected to the respective driver.  
   
   
       22 . The apparatus according to  claim 18  configured to provide the data signal and the clock signal according to an inter-integrated circuit protocol (I 2 C).  
   
   
       23 . The apparatus according to  claim 18  configured to provide the data signal including one or more instructions related to one or more addresses of respective ones of the drivers, at least one driver having an address at least a portion of which is common to an address of each of one or more other drivers such that the driver and respective one or more other drivers are responsive to the data signal from the controller upon receiving, in the data signal, an address including the common portion.  
   
   
       24 . The apparatus according to  claim 18  configured to provide the data signal and the clock signal to a modulator for modulating a power signal according to the data signal and the clock signal, the bus comprising at least two conductors configured to carry the modulated power signal.  
   
   
       25 . The apparatus according to  claim 18  configured to provide the data signal and the clock signal to the drivers each of which comprises the plurality of pulse width modulation registers selectable in combination to logarithmically drive the first, second and third LEDs electrically connected to the respective driver.