Selective electroplating onto recessed surfaces

Abstract

Processes for electroplating recessed features on a substrate are provided. The processes are useful in applications such as creating Cu interconnects on integrated circuits.

1 . A process comprising:
 a. providing a substrate, wherein a first surface of the substrate comprises substantially flat areas and recessed features;   b. coating the first surface of the substrate with a continuous, conformal first metallic layer;   c. coating the continuous conformal first metallic layer with a conformal layer of a second metal;   d. selectively removing substantially all of the second metal from the substantially flat areas using membrane-mediated electropolishing to expose the first metallic layer in the substantially flat areas, while leaving the recessed areas substantially covered by the second metal;   e. creating a layer of a substantially insoluble, electrically insulating compound on the exposed surfaces of the conformal layer of the first metallic layer, while leaving intact a sufficient portion of the first metallic layer to carry electrical current to all recessed features on the substrate surface; and   f. electroplating a conformal layer of a third metal onto the second metal layer in the recessed features.   
   
   
       2 . The process of  claim 1 , wherein the first metallic layer comprises at least one material selected from Ta and TaN. 
   
   
       3 . The process of  claim 1 , wherein the second metal comprises Cu. 
   
   
       4 . The process of  claim 1 , wherein the third metal comprises Cu. 
   
   
       5 . The process of  claim 1 , wherein the first metallic layer comprises Ta and the substantially insoluble, electrically insulating layer comprises an oxide of Ta. 
   
   
       6 . The process of  claim 1 , wherein the substrate is a silicon wafer. 
   
   
       7 . The process of  claim 1 , wherein coating the first metallic layer on the substrate is conducted by physical vapor deposition, chemical vapor deposition, or atomic layer deposition. 
   
   
       8 . The process of  claim 1 , wherein coating the second metal on the first metallic layer is conducted by physical vapor deposition, chemical vapor deposition, or atomic layer deposition. 
   
   
       9 . The process of  claim 1 , wherein the membrane-mediated electropolishing comprises:
 a. providing a cathode half-cell comprising:
 1. a fully or partially enclosed volume, cavity or vessel; 
 2. an electrolyte solution or gel which partially or essentially fills the enclosed volume, cavity or vessel; 
 3. an electrode in contact with the electrolyte solution or gel; 
 4. a means for electrically connecting the electrode to a DC power source; and 
 5. a charge-selective ion-conducting membrane which seals one surface of the enclosed volume, cavity or vessel in such a way that the internal surface of said membrane contacts the electrolyte solution or gel and the external surface is accessible to contact the conformal layer of the second metal and a low-conductivity solvent or solution; 
   b. substantially covering the conformal layer of the second metal with the low-conductivity solvent or solution;   c. providing a source of DC electrical power whose positive terminal is connected to the conformal layer of the second metal and whose negative terminal is connected to the electrode in the half-cell; and   d. contacting the conformal layer of the second metal with at least a portion of the external surface of the membrane.   
   
   
       10 . The process of  claim 9 , wherein the membrane is a perfluorosulfonate ionomer membrane.