Semiconductor device and manufacturing method for the same

Abstract

To provide a small, high-performance semiconductor device in which contact between adjacent wires is prevented for increased flexibility in designing a wiring layout, and an efficient method for manufacturing the semiconductor device. The semiconductor device includes a substrate 10 having an electrode 21 A arranged on its surface; and a first semiconductor element 11 A which includes an electrode 22 arranged on its surface and which is supported by the substrate 10 , wherein a first wire 41 is connected through a first bump 31 to at least one of the electrodes over the substrate 10 and semiconductor element 11 A (i.e., at least one of the electrodes 21 and 22 ), and a second wire 42 is connected through a second bump 32 to a bonding portion of the wire 41.

1 . A semiconductor device comprising:
 a substrate having an electrode arranged on a surface thereof; and   a first semiconductor element which has an electrode arranged on a surface thereof and which is supported by the substrate,   wherein a first wire is connected through a first bump to at least one of the electrodes over the substrate and first semiconductor element, and a second wire is connected through a second bump to a bonding portion of the first wire.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the first wire is stitch-bonded to the first bump, and the second wire is stitch-bonded to the second bump. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein at least one third bump is arranged between the first and second bumps. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein a forth bump is arranged on a bonding portion of the second wire, and a third wire is connected to the fourth bump. 
     
     
         5 . The semiconductor device according to  claim 1 , further comprising:
 a second semiconductor element which has an electrode arranged on a surface thereof and which is supported by the first semiconductor element.   
     
     
         6 . The semiconductor device according to  claim 5 , wherein the electrodes arranged on the first and second semiconductor elements serve as power source terminals, and the electrodes are electrically connected to a third electrode with a fourth wire, the third electrode arranged near the center of the second semiconductor element. 
     
     
         7 . The semiconductor device according to  claim 1 , further comprising:
 a fifth wire which intersects with at least one of the first and second wires and which is arranged away from the first and second wires.   
     
     
         8 . A semiconductor device comprising:
 a first semiconductor element which has an electrode arranged on a surface thereof; and   a base which has an electrode arranged on a surface thereof and which is supported by the first semiconductor element,   wherein a first wire is connected through a first bump to at least one of the electrodes arranged on the base and first semiconductor element, and a second wire is connected through a second bump to a bonding portion of the first wire.   
     
     
         9 . The semiconductor device according to  claim 8 , wherein a second semiconductor element is arranged on at least one of the first semiconductor element and the base. 
     
     
         10 . A method for manufacturing a semiconductor device, comprising:
 providing a semiconductor element over a substrate, the semiconductor element having an electrode arranged on a surface thereof, the substrate having an electrode arranged on a surface thereof;   connecting, through a first bump, a first wire to at least one of the electrodes arranged on the substrate and semiconductor element; and   connecting, through a second bump, a second wire to a bonding portion of the first wire.   
     
     
         11 . The method for manufacturing a semiconductor device according to  claim 10 , wherein the first wire is stitch-bonded to the first bump, and the second wire is stitch-bonded to the second bump. 
     
     
         12 . The method for manufacturing a semiconductor device according to  claim 10 , wherein the formation of the first bump is conducted by mews of ball bonding in which load is applied and ultrasonic vibration is applied in a direction substantially perpendicular to the load application direction, and the formation of the second bump is conducted by means of ball bonding in which load is applied.