Interlayer dielectric layer for printed wiring board, printed wiring board, and method of producing the same

Abstract

A printed wiring board including a substrate, conductor circuits and interlayer dielectric layers stacked alternately on the substrate, each of the interlayer dielectric layers including a curable resin having flaky particles dispersed therein, and viaholes formed in the interlayer dielectric layers and electrically connecting the conductor circuits at different levels.

1 . A printed wiring board comprising: 
 a substrate;    conductor circuits and interlayer dielectric layers stacked alternately on the substrate, each of the interlayer dielectric layers comprising a curable resin having flaky particles dispersed therein; and    viaholes formed in the interlayer dielectric layers and electrically connecting the conductor circuits at different levels.    
     
     
         2 . The printed wiring board according to  claim 1 , wherein the flaky particles have a mean length ranging from 0.01 to 3 μm, a mean width ranging from 0.01 to 3 μm and a thickness ranging from 0.001 to 1 μm.  
     
     
         3 . The printed wiring board according to  claim 2 , wherein the flaky particles have a ratio of the mean length to the mean width, falling within a range of 1 to 20.  
     
     
         4 . The printed wiring board according to  claim 2 , wherein the flaky particles have an aspect ratio of mean length to thickness, falling with a range of 20 to 2000.  
     
     
         5 . The printed wiring board according to  claim 1 , wherein the curable resin has the flaky particles of 1 to 50% by weight dispersed therein.  
     
     
         6 . The printed wiring board according to  claim 1 , wherein each of the flaky particles comprises laminated silicate layers, a mean interlayer distance of which is 3 nm or more as determined by a wide-angle X-ray diffractometry or transmission electron microscopy, and at least part of the flaky particles comprise less than five laminated silicate layers.  
     
     
         7 . The printed wiring board according to  claim 1 , wherein the curable resin comprises at least one selected from the group consisting of a thermosetting resin, a mixture of thermosetting resin and thermoplastic resin, a photosensitized thermosetting resin, a mixture of photosensitized thermosetting resin and thermoplastic resin, and a photosensitive resin.  
     
     
         8 . The printed wiring board according to  claim 7 , wherein the curable resin comprises the thermosetting resin, and the thermosetting resin contains at least a compound containing an epoxy group and a curing agent.  
     
     
         9 . The printed wiring board according to  claim 8 , wherein the compound containing the epoxy group has a conjugated diene structure.  
     
     
         10 . The printed wiring board according to  claim 8 , wherein the curing agent has a phenol skeleton.  
     
     
         11 . The printed wiring board according to  claim 1 , wherein the conductor circuits and the viaholes are formed in the interlayer dielectric layers by an imprint method using a mold having convexities which are in a mirror-image relation with the conductor circuits and the viaholes.  
     
     
         12 . A multilayer printed wiring board comprising: 
 a core substrate;    conductor circuits and interlayer dielectric layers stacked alternately on the core substrate, the interlayer dielectric layers comprising at least one selected from the group consisting of a thermosetting resin, a mixture of thermosetting resin and thermoplastic resin, a photosensitized thermosetting resin, a mixture of photosensitized thermosetting resin and thermoplastic resin, and a photosensitive resin; and    viaholes formed in the interlayer dielectric layers and electrically connecting the conductor circuits at different levels,    wherein the conductor circuits and the viaholes are formed in the interlayer dielectric layers by an imprint method using a mold having convexities which are in a mirror-image relation with the conductor circuits and the viaholes.    
     
     
         13 . The multilayer printed wiring board according to  claim 12 , wherein the interlayer dielectric layers further include flaky particles.  
     
     
         14 . The printed wiring board according to  claim 13 , wherein the flaky particles have a mean length ranging from 0.01 to 3 μm, a mean width ranging from 0.01 to 3 μm and a thickness ranging from 0.001 to 1 μm.  
     
     
         15 . The printed wiring board according to  claim 13 , wherein the flaky particles have a ratio of the mean length to the mean width, falling within a range of 1 to 20.  
     
     
         16 . The printed wiring board according to  claim 13 , wherein the flaky particles have an aspect ratio of mean length to thickness, falling with a range of 20 to 2000.  
     
     
         17 . The printed wiring board according to  claim 13 , wherein the interlayer dielectric layers have the flaky particles of 1 to 50% by weight dispersed therein.  
     
     
         18 . The printed wiring board according to  claim 12 , wherein each of the flaky particles comprises laminated silicate layers, a mean interlayer distance of which is 3 nm or more as determined by a wide-angle X-ray diffractometry or transmission electron microscopy, and at least part of the flaky particles comprise less than five laminated silicate layers.  
     
     
         19 . The printed wiring board according to  claim 12 , wherein the interlayer dielectric layers include the thermosetting resin, and the thermosetting resin contains at least a compound containing an epoxy group and a curing agent.  
     
     
         20 . The printed wiring board according to  claim 19 , wherein the compound containing the epoxy group has a conjugated diene structure.  
     
     
         21 . The printed wiring board according to  claim 19 , wherein the curing agent has a phenol skeleton.