Semiconductor device having fin-field effect transistor and manufacturing method thereof

Abstract

A semiconductor device includes an element isolation region formed in a semiconductor substrate, an active region surrounded by the element isolation region, and a gate electrode formed in one direction to cross the active region. The semiconductor substrate includes two gate trenches formed in parallel to a major axis direction of the active region in the active region, and a fin-shaped part which is located between the two gate trenches. The gate electrode is buried in the two gate trenches and formed on the fin-shaped part. The fin-shaped part serves as a channel region. A fin field effect transistor in which a width of the channel region is smaller than a gate length is thereby obtained.

1 . A semiconductor device comprising a fin-shaped channel region and a gate electrode,
 wherein the channel region located under the gate electrode has a width smaller than a gate length.   
     
     
         2 . The semiconductor device as claimed in  claim 1 , wherein the channel region is interposed between two gate trenches and the gate electrode is formed continuously in the two gate trenches. 
     
     
         3 . The semiconductor device as claimed in  claim 1 , further comprising a source region and a drain region formed on both sides of the channel region, respectively,
 the source region and the drain region are larger in width than the channel region.   
     
     
         4 . A semiconductor device comprising:
 an element isolation region formed in a semiconductor substrate;   an active region surrounded by the element isolation region and elongated to a first direction;   a gate electrode formed in a second direction crossing the first direction;   two gate trenches formed in the semiconductor substrate located at a cross region of the active region and the gate electrode, the two gate trenches being elongated to the first direction in parallel; and   a fin-shaped part that is a part of the semiconductor substrate and located between the two gate trenches,   wherein the gate electrode is buried in the gate trenches and formed on the fin-shaped part, thereby the fin-shaped part serves as a cannel region.   
     
     
         5 . The semiconductor device as claimed in  claim 4 , wherein a width of the channel region is smaller than a gate length. 
     
     
         6 . The semiconductor device as claimed in  claim 4 , wherein a gate insulating film is formed at least on an upper surface and a side surface of the fin-shaped part. 
     
     
         7 . The semiconductor device as claimed in  claim 5 , wherein a gate insulating film is formed at least on an upper surface and a side surface of the fin-shaped part. 
     
     
         8 . The semiconductor device as claimed in  claim 6 , wherein the gate insulating film is formed on both side surfaces of the fin-shaped part. 
     
     
         9 . The semiconductor device as claimed in  claim 7 , wherein the gate insulating film is formed on both side surfaces of the fin-shaped part. 
     
     
         10 . A method of manufacturing a semiconductor substrate comprising steps of:
 forming a mask layer on a semiconductor substrate, the mask layer covering up a region to serve as an active region and including an opening for exposing a region to serve as an STI region;   forming a trench for the STI region using the mask layer;   forming a first insulating film in the trench and in the opening of the mask layer without removing the mask layer;   forming a second opening corresponding to the mask layer in the first insulating film by selectively removing the mask layer;   forming a sidewall insulating film on an inner wall of the second opening;   forming a second insulating film in the second opening in which the sidewall insulating film is formed;   selectively removing the sidewall insulating film in a region in which a gate electrode is to be formed;   forming two trenches in the region in which the gate electrode is to be formed on the semiconductor substrate using the first insulating film and the second insulating film as a mask, and forming a fin-shaped part which is located between the two gate trenches, which is a part of the semiconductor substrate, and which is to serve as a channel region;   forming a gate insulating film at least on an upper surface and a side surface of the fin-shaped part; and   forming the gate electrode buried in the two gate trenches and covering up the fin-shaped part.   
     
     
         11 . The method of manufacturing the semiconductor device as claimed in  claim 10 , wherein a width of the channel region is smaller than a gate length. 
     
     
         12 . The method of manufacturing the semiconductor device as claimed in  claim 10 , further comprising:
 forming a source region and a drain region by implanting impurity ions into the semiconductor substrate using the gate electrode as a mask; and   selectively removing the gate insulating film formed on surfaces of the source region and the drain region, thereby forming contact regions on the surfaces of the source region and the drain region, respectively.   
     
     
         13 . The method of manufacturing the semiconductor device as claimed in  claim 11 , further comprising:
 forming a source region and a drain region by implanting impurity ions into the semiconductor substrate using the gate electrode as a mask; and   selectively removing the gate insulating film formed on surfaces of the source region and the drain region, thereby forming contact regions on the surfaces of the source region and the drain region, respectively.   
     
     
         14 . The method of manufacturing the semiconductor device as claimed in  claim 12 , wherein a width of the contact region in one direction to cross the active region is larger than a width of the channel region. 
     
     
         15 . The method of manufacturing the semiconductor device as claimed in  claim 13 , wherein a width of the contact region in one direction to cross the active region is larger than a width of the channel region. 
     
     
         16 . The method of manufacturing the semiconductor device as claimed in  claim 10 , wherein the gate insulating film is formed on both side surfaces of the fin-shaped part. 
     
     
         17 . The method of manufacturing the semiconductor device as claimed in  claim 11 , wherein the gate insulating film is formed on both side surfaces of the fin-shaped part. 
     
     
         18 . The method of manufacturing the semiconductor device as claimed in  claim 12 , wherein the gate insulating film is formed on both side surfaces of the fin-shaped part. 
     
     
         19 . The method of manufacturing the semiconductor device as claimed in  claim 13 , wherein the gate insulating film is formed on both side surfaces of the fin-shaped part. 
     
     
         20 . A data processing system comprising a data processor and a semiconductor memory device, wherein the semiconductor memory device includes:
 an element isolation region formed in a semiconductor substrate;   an active region surrounded by the element isolation region and elongated to a first direction;   a gate electrode formed in a second direction crossing the first direction;   two gate trenches formed in the semiconductor substrate located at a cross region of the active region and the gate electrode, the two gate trenches being elongated to the first direction in parallel; and   a fin-shaped part that is a part of the semiconductor substrate and located between the two gate trenches,   wherein the gate electrode is buried in the gate trenches and formed on the fin-shaped part, thereby the fin-shaped part serves as a cannel region.