US2008023221A1PendingUtilityA1
Via structure of printed circuit board
Est. expiryJul 28, 2026(expired)· nominal 20-yr term from priority
H05K 2201/09309H05K 1/0245H05K 1/0251H05K 2201/09718H05K 3/429H05K 2201/09636H05K 1/116
45
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
An exemplary printed circuit board includes at least a pair of differential vias defined therein, each of the differential vias has an annular ring formed on the PCB, a conductive hole defined in the PCB, and a clearance hole defined in at least one inner layer of the PCB. Each of the clearance holes of the differential vias is oval shaped thus providing a greater area for the clearance holes and needed clearance between vias without creating a superposition zone.
Claims
exact text as granted — not AI-modified1 . A printed circuit board defining at least a pair of differential vias, each of the differential vias comprising:
an annular ring formed on an outer surface of the PCB; a conductive hole defined in the PCB; and a clearance hole defined in at least one inner layer of the PCB, wherein the clearance hole is oval shaped, and a space is left between the clearance holes of the at least a pair of differential vias.
2 . A printed circuit board comprising:
at least one outer layer; at least one inner layer; and at least a pair of differential vias each comprising;
an annular ring formed on the at least one outer layer;
a conductive hole extending through the at least one outer layer and the at least one inner layer; and
a clearance hole defined in the at least one inner layer, wherein the clearance hole is oval shaped, and a space is left between the clearance holes of the at least a pair of differential vias.
3 . The printed circuit board as claimed in claim 2 , wherein the annular ring, the conductive hole and the clearance hole are coaxial.
4 . The printed circuit board as claimed in claim 3 , comprising two outer layers each of which has formed thereon at least two annular rings corresponding to the at least a pair of differential vias.Join the waitlist — get patent alerts
Track US2008023221A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.