ADIP demodulation method and apparatus

Abstract

An ADIP demodulation method and apparatus, which are used in an optical disk driver to generate the ADIP information according to a wobble signal. The apparatus includes a slicing unit for receiving the wobble signal and generating a wobble pulse, a phase locked loop for generating a reference wobble signal with the same frequency and phase as the wobble pulse and a reference clock with frequency higher than the wobble pulse, a channel bit generator for generating a channel bit signal according to the reference wobble signal and the wobble pulse, and a decoder for decoding to ADIP information according to the channel bit signal. The channel bit generator generates a difference signal between the wobble pulse and the reference wobble signal, and outputs the channel bit signal according to the difference signal.

1 . An ADIP demodulation apparatus for providing ADIP information according to a wobble signal modulated with the ADIP information, the ADIP demodulation apparatus comprising: 
 a digitize unit for receiving the wobble signal and generating a wobble pulse;    a phase locked loop for generating a reference wobble signal according to the wobble pulse;    an ADIP channel bit determination unit for determining an ADIP channel bit according to the reference wobble signal and the wobble pulse; and    a decoder for decoding the ADIP channel bit to generate the ADIP information.    
   
   
       2 . The ADIP demodulation apparatus according to  claim 1 , wherein the ADIP channel bit determination unit comprises: 
 a comparator for comparing the wobble pulse and the reference wobble signal and generating a difference signal;    a counter for counting the width of high level of the difference signal corresponding to a period of the reference wobble signal using a counting clock and outputting a count value; and    a decision unit for comparing the count value with a threshold value and then outputting the ADIP channel bit.    
   
   
       3 . The ADIP demodulation apparatus according to  claim 2 , further comprising a reference clock generator for generating the counting clock according to the wobble pulse.  
   
   
       4 . The ADIP demodulation apparatus according to  claim 2 , wherein the comparator is an XOR gate.  
   
   
       5 . The ADIP demodulation apparatus according to  claim 2 , wherein the ADIP channel bit determination unit further comprises: 
 an edge generator for generating an edge signal according to the reference wobble signal;    wherein the counter cleans the count value according to the edge signal.    
   
   
       6 . An ADIP demodulation method for providing ADIP information according to a wobble signal modulated with the ADIP information, the ADIP demodulation method comprising the steps of: 
 generating a wobble pulse by digitizing the wobble signal;    generating a reference wobble signal according to the wobble pulse;    determining an ADIP channel bit according to the reference wobble signal and the wobble pulse; and    decoding the ADIP channel bit to generate the ADIP information.    
   
   
       7 . The ADIP demodulation method according to  claim 6 , wherein the step of determining an ADIP channel bit comprises: 
 generating a difference signal by comparing the wobble pulse with the reference wobble signal;    counting the width of high level of the difference signal corresponding to a period of the reference wobble signal using a counting clock and outputting a count value; and    comparing the count value with a threshold value and then outputting the ADIP channel bit.    
   
   
       8 . The ADIP demodulation method according to  claim 7 , wherein the counting clock is generated according to the wobble pulse.  
   
   
       9 . The ADIP demodulation method according to  claim 7 , wherein the step of generating the difference signal by comparing the wobble pulse with the reference wobble signal is performed by an XOR gate.  
   
   
       10 . The ADIP demodulation method according to  claim 7 , wherein the step of determining an ADIP channel bit further comprises: 
 generating an edge signal according to the reference wobble signal; and    cleaning the count value according to the edge signal.