Semiconductor device

Abstract

A semiconductor device includes: a semiconductor layer having a shading target region; a semiconductor element provided on the semiconductor layer in the shading target region; a first interlayer dielectric provided on the semiconductor element; a plurality of first shading layers provided on the first interlayer dielectric; a second interlayer dielectric provided on at least the first shading layers; and a second shading layer provided on the second interlayer dielectric and having a predetermined pattern. The second shading layer has such a pattern that the second shading layer is positioned at least between the adjacent first shading layers.

1 . A semiconductor device, comprising: 
 a semiconductor layer having a shading target region;    a semiconductor element provided on the semiconductor layer in the shading target region;    a first interlayer dielectric provided on the semiconductor element;    a plurality of first shading layers provided on the first interlayer dielectric;    a second interlayer dielectric provided on at least the first shading layers; and    a second shading layer provided on the second interlayer dielectric,    wherein the second shading layer has such a pattern that the second shading layer is provided at least between the adjacent first shading layers.    
   
   
       2 . The semiconductor device as defined in  claim 1 , 
 wherein the shading target region is covered with at least one of the first shading layer and the second shading layer.    
   
   
       3 . The semiconductor device as defined in  claim 1 , 
 wherein the second shading layer has a pattern including at least an inverted shape of the first shading layer.    
   
   
       4 . The semiconductor device as defined in  claim 1 , 
 wherein at least one of the first shading layer and the second shading layer has maximum dimensions according to a design rule in the shading target region.    
   
   
       5 . The semiconductor device as defined in  claim 1 , 
 wherein the second shading layer is provided to partially overlap the first shading layer.    
   
   
       6 . The semiconductor device as defined in  claim 1 , 
 wherein the first shading layer is an interconnect layer.    
   
   
       7 . The semiconductor device as defined in  claim 1 , 
 wherein the second shading layer is an interconnect layer.    
   
   
       8 . The semiconductor device as defined in  claim 1 , further comprising: 
 a via layer which connects the first shading layer and the second shading layer.    
   
   
       9 . The semiconductor device as defined in  claim 8 , 
 wherein the via layer is provided in an overlapping area of the first shading layer and the second shading layer.    
   
   
       10 . The semiconductor device as defined in  claim 1 , further comprising: 
 a third interlayer dielectric provided between the semiconductor element and the first interlayer dielectric; and    an interconnect layer provided on the third interlayer dielectric,    wherein the interconnect layer has maximum dimensions according to a design rule in the shading target region.    
   
   
       11 . A semiconductor device, comprising: 
 a semiconductor layer having a shading target region;    a semiconductor element provided on the semiconductor layer in the shading target region;    a first interlayer dielectric provided on the semiconductor element;    a first shading layer provided on the first interlayer dielectric,    wherein the first shading layer has maximum dimensions according to a design rule in the shading target region.    
   
   
       12 . The semiconductor device as defined in  claim 1 , comprising: 
 a shading region provided outside the shading target region,    wherein the shading region includes:    the first interlayer dielectric provided on the semiconductor layer;    a first metal layer provided on the first interlayer dielectric;    at least one contact layer provided between the semiconductor layer and the first metal layer;    the second interlayer dielectric provided on at least the first metal layer;    a second metal layer provided on the second interlayer dielectric; and    at least one via layer which connects the first metal layer and the second metal layer.    
   
   
       13 . The semiconductor device as defined in  claim 12 , 
 wherein the shading region is provided to enclose the shading target region.    
   
   
       14 . The semiconductor device as defined in  claim 12 , 
 wherein the via layer is formed by filling a ring-shaped groove with a conductive layer in the shading region.    
   
   
       15 . The semiconductor device as defined in  claim 12 , 
 wherein the contact layer is formed by filling a ring-shaped groove with a conductive layer in the shading region.    
   
   
       16 . The semiconductor device as defined in  claim 12 , 
 wherein the via layers are provided in the shading region in a staggered arrangement.    
   
   
       17 . The semiconductor device as defined in  claim 12 , 
 wherein the contact layers are provided in the shading region in a staggered arrangement.    
   
   
       18 . The semiconductor device as defined in  claim 11 , comprising: 
 a shading region provided outside the shading target region,    wherein the shading region includes:    the first interlayer dielectric provided on the semiconductor layer;    a first metal layer provided on the first interlayer dielectric;    at least one contact layer provided between the semiconductor layer and the first metal layer;    the second interlayer dielectric provided on at least the first metal layer;    a second metal layer provided on the second interlayer dielectric; and    at least one via layer which connects the first metal layer and the second metal layer.    
   
   
       19 . The semiconductor device as defined in  claim 18 , 
 wherein the shading region is provided to enclose the shading target region.