SONOS memory device

Abstract

A SONOS memory device, and a method of manufacturing the same, includes a substrate and a multifunctional device formed on the substrate. The multifunctional device performs both switching and data storing functions. The multifunctional device includes first and second impurities areas, a channel formed between the first and second impurities areas, and a stacked material formed on the channel for data storage. The stacked material for data storage is formed by sequentially stacking a tunneling oxide layer, a memory node layer in which data is stored, a blocking layer, and an electrode layer.

1   32 . (canceled)  
   
   
       33 . A memory device, comprising: 
 a semiconductor substrate;    a tunneling insulating layer on the substrate;    a memory node layer on the tunneling insulating layer;    a blocking insulating layer on the memory node layer; and    an electrode layer on the blocking insulating layer,    wherein the memory node layer includes metal and nitrogen.    
   
   
       34 . The memory device as claimed in  claim 33 , wherein another tunneling insulating layer is further formed between the tunneling insulating layer and the memory node layer.  
   
   
       35 . Them memory device as claimed in  claim 33 , wherein another blocking insulating layer is further formed between the blocking insulating layer and the electrode layer.  
   
   
       36 . The memory device as claimed in  claim 33 , wherein the memory node layer is a metal-oxide-nitride (MON) or a metal-silicon-oxide-nitride (MSiON) layer.  
   
   
       37 . The memory device as claimed in  claim 33 , wherein the tunneling insulating layer is a silicon oxide (SiO 2 ) layer.  
   
   
       38 . The memory device as claimed in  claim 34 , wherein the another tunneling insulating layer is an aluminum oxide (Al 2 O 3 ) layer.  
   
   
       39 . The memory device as claimed in  claim 33 , wherein the blocking insulating layer is an aluminum oxide (Al 2 O 3 ) layer or a silicon oxide (SiO 2 ) layer.  
   
   
       40 . The memory device as claimed in  claim 35 , wherein the another blocking layer includes an hafnium oxide (HfO 2 ) layer, a zirconium oxide (ZrO 2 ) layer, a tantalum oxide (Ta 2 O 5 ) or a titanium oxide (TiO 2 ) layer.  
   
   
       41 . The memory device as claimed in  claim 36 , wherein the metal is hafnium (Hf), zirconium (Zr), tantalum (Ta), titanium (Ti), aluminum (Al), or a lanthanide (Ln), where ther Ln is lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), or lutetium (Lu).  
   
   
       42 . The memory device as claimed in  claim 36 , wherein the MON or MSiON layer includes nitrogen (N) of about 1 atomic % to about 80 atomic %.