Semiconductor device having silicide thin film and method of forming the same

Abstract

The present invention provides a semiconductor device having a silicide thin film and method of forming the same. A semiconductor device comprises a gate insulation layer formed on an active region of a semiconductor substrate. A gate electrode is formed on the gate insulation layer. An impurity region is formed in the active region adjacent the gate electrode. A silicide thin film such as a cobalt silicide thin film is formed to a thickness of less than approximately 200 Å in the impurity region.

1 . A method for forming a semiconductor device, comprising: 
 forming a gate insulation layer on a semiconductor substrate;    forming a gate electrode on the gate insulation layer;    forming a lightly-doped impurity region in the semiconductor substrate adjacent to the sidewalls of the gate electrode;    forming a first spacer on the both sides of the gate electrode and on the lightly-doped impurity region, wherein the first spacer is L-shaped;    forming a second spacer on the first spacer;    forming a heavily-doped impurity region in the semiconductor substrate adjacent to the second spacer;    forming a cobalt layer on gate electrode, the first spacer, the second spacer and the heavily-doped impurity region;    performing a first heat treatment at a first temperature to react a portion of the cobalt layer with the semiconductor substrate, thereby forming a first-type metal silicide layer;    removing non-reacted portions of the cobalt layer;    forming a subsidiary layer on the gate electrode, the first spacer, the second spacer and the first-type metal silicide layer; and    performing a second heat treatment at a second temperature thereby transforming the first-type metal silicide layer into a second-type metal silicide layer, wherein the second heat treatment is performed such that, during the second heat treatment, a portion of the subsidiary layer facing toward the second-type cobalt silicide layer consumes oxygen contained in the first-type metal silicide layer.    
   
   
       2 . The method according to  claim 1 , further comprising forming a capping layer on the cobalt layer.  
   
   
       3 . The method according to  claim 2 , wherein the first heat treatment is performed during the forming the capping layer.  
   
   
       4 . The method according to  claim 1 , wherein the second temperature is higher than the first temperature.  
   
   
       5 . The method according to  claim 4 , wherein the first temperature is 150˜300° C. and the second temperature greater than 700° C.  
   
   
       6 . The method according to  claim 1 , wherein the subsidiary layer comprises silicon oxynitride.  
   
   
       7 . The method according to  claim 6 , wherein the portion of the subsidiary layer facing toward the second-type cobalt silicide layer has a higher oxygen concentration than a portion of the subsidiary layer facing away from the second-type cobalt silicide layer after the second heat treatment.  
   
   
       8 . The method according to  claim 6 , further comprising forming an interlayer dielectric layer on the subsidiary layer, wherein the interlayer dielectric layer has an etch selectivity with respect to the subsidiary layer.  
   
   
       9 . The method according to  claim 1 , further comprising, before forming the cobalt layer, reducing a height of the first spacer and the second spacer to expose an upper portion of the gate electrode.