Wiring Board and Semiconductor Device

Abstract

There is disclosed a wiring board comprising a core substrate 110 , a build-up layer 130 a formed on at least one side of main surfaces the core substrate, wherein a cavity 120 for accommodating a chip-type decoupling capacitor 121 is formed in the build-up layer 130 a . The capacitor 121 includes electrode terminals on an upper surface thereof that are directly connected to a semiconductor component, and electrode terminals on a back surface of the capacitor 121 is connected to a wiring conductor layer 132 a on a bottom surface of the cavity 120 . This structure enables decoupling capacitor and the semiconductor component 260 to be connected with low resistance and low inductance.

1 . A wiring board comprising: 
 a core substrate;    a build-up layer formed on at least one side of main surfaces of the core substrate, which comprises wiring conductor layers and insulation layers alternately stacked on each other; and    a capacitor disposed within a cavity that is formed in the build-up layer;    wherein the capacitor has electrode terminals on an upper surface thereof and a back surface of the capacitor has a connection portion that is connected to one of the wiring conductor layers on a bottom surface of the cavity.    
     
     
         2 . The wiring board according to  claim 1 , wherein the upper end of the electrode terminals on the upper surface of the capacitor is flush with the upper end of installation electrode terminals provided on the build-up layer for mounting a semiconductor component.  
     
     
         3 . The wiring board according to  claim 1 , wherein the connection portion comprises electrode terminals provided on the back surface of the capacitor.  
     
     
         4 . The wiring board according to  claim 1 , wherein the connection portion comprises an adhesive layer for bonding the back surface of the capacitor to the wiring conductor layer on the back surface of the cavity.  
     
     
         5 . The wiring board according to  claim 4 , wherein the adhesive layer comprises a material that is melted by heating.  
     
     
         6 . The wiring board according to  claim 5 , wherein the material has a melting point lower than that of a material used for mounting the semiconductor component on the wiring board.  
     
     
         7 . The wiring board according to  claim 4 , wherein the adhesive layer comprises a material that disappears by heating.  
     
     
         8 . The wiring board according to  claim 7 , wherein the material has a boiling point lower than that of a material used for mounting the semiconductor component on the wiring board.  
     
     
         9 . The wiring board according to  claim 2 , further comprising a surface wiring layer for electrically connecting the electrode terminals of the capacitor to the wiring conductor layer of the build-up layer, the surface wiring layer comprising wiring conductor layers and insulation layers alternately stacked on each other and installation electrode terminals for mounting the semiconductor component at a position above the capacitor on the surface wiring layer.  
     
     
         10 . The wiring board according to  claim 9 , wherein the installation electrode terminals are electrically connected to the electrode terminals of the capacitor through the wiring conductor layers in the surface wiring layer.  
     
     
         11 . The wiring board according to  claim 9 , wherein the connection portion comprises an adhesive layer for bonding the back surface of the capacitor to the wiring conductor layer on the bottom surface of the cavity.  
     
     
         12 . A semiconductor device comprising a wiring board and a semiconductor component mounted on the wiring board, the wiring board comprising 
 a core substrate,    a build-up-layer formed on at least one side of main surfaces of the core substrate, which comprises wiring conductor layers and insulation layers alternately stacked on each other,    and a capacitor disposed within a cavity that is formed in the build-up layer, wherein the capacitor have electrode terminals on an upper surface thereof,    the upper ends of the electrode terminals of the capacitor are made flush with the upper ends of installation electrode terminals provided on the build-up layer for mounting a semiconductor component,    and the semiconductor component is connected to the installation electrode terminals of the build-up layer and the electrode terminals of the capacitor.    
     
     
         13 . The semiconductor device according to  claim 12 , further comprising a connection portion interposed between a back surface of the capacitor and one of the wiring conductor layers on a bottom surface of the cavity, the connection portion comprising electrode terminals provided on the back surface of the capacitor.  
     
     
         14 . The semiconductor device according to  claim 12 , further comprising an adhesive layer bonding a back surface of the capacitor to one of the wiring conductor layers between the back surface of the capacitor and the conductor electrode layer on the bottom surface of the cavity.  
     
     
         15 . The semiconductor device according to  claim 12 , wherein a space is present between a back surface of the capacitor and one of the wiring conductor layers on a bottom surface of the cavity.  
     
     
         16 . The semiconductor device according to  claim 15 , wherein the space is generated as a result of disappearance of an adhesive layer interposed between the back surface of the capacitor and the wiring conductor layer on the bottom surface of the cavity by heating.  
     
     
         17 . A semiconductor device comprising a wiring board and a semiconductor component mounted thereon, the wiring board comprising: 
 a core substrate, a build-up layer formed on at least one side of main surfaces of the core substrate, which comprises wiring conductor layers and insulation layers alternately stacked therein, and a capacitor disposed within a cavity that is formed in the build-up layer, the capacitor having electrode terminals on an upper surface thereof; and    a surface wiring layer for electrically connecting the electrode terminals of the capacitor to the wiring conductor layers of the build-up layer, the surface wiring layer comprising wiring conductor layers and insulation layers alternately stacked on each other, and installation electrode terminals for mounting the semiconductor component provided at a position above the capacitor, wherein the semiconductor component is disposed on the surface wiring layer.    
     
     
         18 . The wiring board according to  claim 17 , wherein the installation electrode terminals are electrically connected to the electrode terminals of the capacitor through the wiring conductor layers in the surface wiring layer.