Reduction of dopant loss in a gate structure

Abstract

A semiconductor device includes offset spacers that contact opposing side surfaces of a gate of a gate structure. The offset spacers can be formed by selectively depositing an oxide layer over the gate and the semiconductor substrate so that the opposing side surfaces of the gate e are substantially free of the oxide layer. Offset spacers can then be formed that contact the opposing side surfaces of the gate.

1 . A semiconductor device comprising: 
 a semiconductor substrate    a gate formed on the semiconductor substrate, the gate including opposing side surfaces, and    spacers contacting the opposing side surfaces of the gate electrode substantially along the opposing side surfaces, the opposing side surfaces of the gate electrode being substantially free of a material that depletes the dopant from the gate electrode.    
   
   
       2 . The semiconductor device of  claim 1 , the gate comprising polysilicon doped with a p-type dopant.  
   
   
       3 . The semiconductor device of  claim 2 , the spacers comprising a nitride material.  
   
   
       4 . The semiconductor device of  claim 3 , the semiconductor substrate further comprising source and drain regions, the source and drain regions defining a channel, the gate overlying the channel.