US2007278682A1PendingUtilityA1
Self-assembled mono-layer liner for cu/porous low-k interconnections
Est. expiryMay 31, 2026(expired)· nominal 20-yr term from priority
H10W 20/096H10W 20/425H10W 20/095H10W 20/076H10W 20/48H10W 20/47
48
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
An interconnect structure of an integrated circuit includes a low-k dielectric layer over a semiconductor substrate, a conductor in the low-k dielectric layer, and a dielectric transition layer between the low-k dielectric layer and the conductor, wherein the dielectric transition layer has a thickness of less than about 50 Å.
Claims
exact text as granted — not AI-modified1 . An integrated circuit comprising:
a low-k dielectric layer over a semiconductor substrate; a conductor in the low-k dielectric layer; and a dielectric transition layer between the low-k dielectric layer and the conductor, wherein the dielectric transition layer has a thickness of less than about 50 Å.
2 . The integrated circuit of claim 1 further comprising a diffusion barrier layer on the dielectric transition layer, wherein an atomic percentage of atoms of the diffusion barrier layer in the dielectric transition layer is less than about 0.1%.
3 . The integrated circuit of claim 2 , wherein the diffusion barrier layer comprises a material selected from the group consisting essentially of titanium, titanium nitride, tantalum, tantalum nitride, and combinations thereof.
4 . The integrated circuit of claim 2 , wherein a bottom portion of the diffusion barrier layer is located on a metallic feature, and wherein the metallic feature is in an additional dielectric layer underlying the low-k dielectric layer, and wherein substantially no dielectric transition layer exists on the metallic feature.
5 . The integrated circuit of claim 1 , wherein the dielectric transition layer has a thickness of between about 10 Åand about 30 Å.
6 . The integrated circuit of claim 1 , wherein the dielectric transition layer comprises terminals selected from the group consisting essentially of methyl, ethyl, propyl, and combinations thereof.
7 . The integrated circuit of claim 1 , wherein the dielectric transition layer has a higher carbon concentration than the low-k dielectric layer has.
8 . The integrated circuit of claim 1 , wherein the low-k dielectric layer has a dielectric constant of less than about 2.5.
9 . An integrated circuit comprising:
a porous dielectric layer over a semiconductor substrate; a conductor in the porous dielectric layer; and a mono-layer between and adjoining the porous dielectric layer and the conductor, wherein the mono-layer comprises terminals selected from the group consisting essentially of methyl, ethyl, propyl, and combinations thereof.
10 . The integrated circuit of claim 9 , wherein the terminals comprise methyl.
11 . The integrated circuit of claim 9 , wherein the mono-layer has a carbon concentration higher than a carbon concentration in the low-k dielectric layer.
12 . The integrated circuit of claim 11 , wherein the carbon concentration in the mono-layer is higher than a carbon concentration in the low-k dielectric layer by about three to about 15 percent.
13 . The integrated circuit of claim 9 , wherein the mono-layer exists only at surfaces of the low-k dielectric layer.
14 . The integrated circuit of claim 9 , wherein the mono-layer comprises Si—(CH 3 ) 3 terminals.
15 . An integrated circuit comprising:
a porous dielectric layer over a semiconductor substrate; an opening in the porous dielectric layer; a dielectric transition layer on at least sidewalls of the porous dielectric layer in the opening, wherein the dielectric transition layer has a thickness of less than about 50 Å, and wherein a first carbon concentration in the dielectric transition layer is greater than a second carbon concentration in the porous dielectric layer; and a diffusion barrier layer on the dielectric transition layer.
16 . The integrated circuit of claim 15 , wherein the first carbon concentration is greater than the second carbon concentration by about three to about 15 percent.Join the waitlist — get patent alerts
Track US2007278682A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.