US2007267744A1PendingUtilityA1

Manufacturing a bump electrode with roughened face

Assignee: SEIKO EPSON CORPPriority: Nov 18, 1999Filed: May 14, 2007Published: Nov 22, 2007
Est. expiryNov 18, 2019(expired)· nominal 20-yr term from priority
H10W 70/655H10W 72/952H10W 72/9415H10W 72/923H10W 72/012H10W 72/261H10W 72/20H10W 72/07251H10W 72/251H10W 72/252H10W 72/234H10P 50/667
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Claims

Abstract

A semiconductor device and a method for making the same, wherein bumps of a semiconductor chip and inner leads of a film tape carrier can be securely bonded to each other by thermal welding using a heating unit.

Claims

exact text as granted — not AI-modified
1 . A semiconductor chip, comprising: 
 an electrode pad; and    a bump having a first face where a plurality of prominences are formed and a second face.    
   
   
       2 . The semiconductor chip according to  claim 1 , 
 the electrode pad being electrically connected to the bump through the second face.    
   
   
       3 . The semiconductor chip according to  claim 1 , 
 the plurality of prominences including a plurality of first prominences formed in a first area of the first face that overlaps the electrode pad.    
   
   
       4 . The semiconductor chip according to  claim 3 , 
 the plurality of prominences further including a plurality of second prominences formed on a second area of the first face that is located between the first area and an outer circumference of the first face.    
   
   
       5 . The semiconductor chip according to  claim 1 , 
 the first face to be connected to a tape substrate.    
   
   
       6 . The semiconductor chip according to  claim 1 , further comprising: 
 at least one metal layer between the electrode pad and the second face.    
   
   
       7 . The semiconductor chip according to  claim 1 , further comprising: 
 a passivation film that covers a part of the electrode pad.    
   
   
       8 . The semiconductor chip according to  claim 4 , further comprising: 
 a passivation film that covers an outer circumference of the electrode pad, the passivation film overlapping the second area.    
   
   
       9 . The semiconductor chip according to  claim 7 , 
 the passivation film covering the outer circumference of the electrode pad.    
   
   
       10 . The semiconductor chip according to  claim 1 , 
 the plurality of prominences having heights ranging from 1 μm to 3 μm.    
   
   
       11 . The semiconductor chip according to  claim 1 , further comprising: 
 a semiconductor element,    the semiconductor element being connected to the electrode pad.    
   
   
       12 . The semiconductor chip according to  claim 11 , 
 the semiconductor element being formed in a silicon wafer.    
   
   
       13 . A semiconductor device, comprising: 
 the semiconductor chip according to  claim 1;  and    a tape substrate.    
   
   
       14 . A semiconductor device, comprising: 
 the semiconductor chip according to  claim 3;  and    a tape substrate.    
   
   
       15 . A semiconductor device, comprising: 
 a semiconductor element;    an electrode pad connected to the semiconductor element;    a bump having a first face where a plurality of prominences are formed and a second face; and    a tape substrate that is connected to the bump through the first face.    
   
   
       16 . The semiconductor device according to  claim 15 , 
 the tape substrate including a lead that contacts the first face.    
   
   
       17 . The semiconductor device according to  claim 15 , 
 the tape substrate being connected to the bump through a metal layer disposed between the first face and the tape substrate.    
   
   
       18 . The semiconductor device according to  claim 17 , 
 the metal layer including a metal alloy.    
   
   
       19 . The semiconductor chip according to  claim 1 , 
 the first face being roughed.

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