Soi substrate and semiconductor integrated ciruit device

Abstract

A semiconductor IC device includes a base substrate comprising P − -type silicon, a first P + -type silicon layer is provided on the base substrate, and an N + -type silicon layer and a second P + -type silicon layer are provided in the same layer thereon. The impurity concentration of the first P + -type silicon layer and the N + -type silicon layer is higher than that of the base substrate. Also, a buried oxide layer and an SOI layer are provided on the entire upper surface of the N + -type silicon layer and the second P + -type silicon layer. The first P + -type silicon layer is connected to ground potential wiring GND, and the N + -type silicon layer is connected to power-supply potential wiring VDD. Accordingly, a decoupling capacitor, which is connected in parallel to the power supply, is formed between the P + -type silicon layer and the N + -type silicon layer.

1 . An SOI substrate comprising: 
 a base substrate;    a first semiconductor region which is disposed in a part of the base substrate and which has a lower resistivity than that of the base substrate;    an insulating film disposed on the base substrate; and    a semiconductor layer disposed on the insulating film so as to form a semiconductor integrated circuit,    wherein the base substrate comprises a first conductive semiconductor and the first semiconductor region comprises a second conductive semiconductor, so that a PN junction is formed between the base substrate and the first semiconductor region.    
     
     
         2 . An SOI substrate according to  claim 1 , wherein the first semiconductor region is a layer formed by epitaxial growth.  
     
     
         3 . An SOI substrate according to  claim 1 , wherein the first semiconductor region is formed by doping an impurity into the base substrate.  
     
     
         4 . A semiconductor integrated circuit device comprising: 
 a base substrate;    a first semiconductor region which is disposed in a part of the base substrate and which has a lower resistivity than that of the supporting substrate, a first potential being applied to the first semiconductor region;    an insulating film disposed on the base substrate;    a semiconductor layer disposed on the insulating film; and    an integrated circuit disposed in the semiconductor layer,    wherein the base substrate comprises a first conductive semiconductor and a second potential is applied to the base substrate, the first semiconductor region comprises a second conductive semiconductor, and a decoupling capacitor is formed between the base substrate and the first semiconductor region.    
     
     
         5 . A semiconductor integrated circuit device according to  claim 4 , further comprising a first via which extends through the semiconductor layer and the insulating film and which is connected to the first semiconductor region, 
 wherein the first potential is applied to the first semiconductor region through the first via.    
     
     
         6 . A semiconductor integrated circuit device according to  claim 4 , further comprising: 
 a first conductive contact region disposed in the same layer as the first semiconductor region; and    a second via which extends through the semiconductor layer and the insulating film and which is connected to the contact region,    wherein the second potential is applied to the base substrate through the contact region and the second via.    
     
     
         7 . A semiconductor integrated circuit device according to  claim 4 , wherein the second potential is applied to the base substrate through the back surface thereof.  
     
     
         8 . A semiconductor integrated circuit device according to  claim 4 , wherein the first semiconductor region is a layer formed by epitaxial growth.  
     
     
         9 . A semiconductor integrated circuit device according to  claim 4 , wherein the first semiconductor region is formed by doping an impurity into the base substrate.