US2007257313A1PendingUtilityA1
Semiconductor memory device including an SOI substrate
Est. expiryDec 3, 2013(expired)· nominal 20-yr term from priority
H10D 89/10H10D 86/201H10D 86/01G11C 11/404G11C 2211/4016H10B 12/00G11C 11/4097H10B 12/20H10B 12/50
53
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
A semiconductor memory device includes a plurality of N and P channel MOS transistors. The plurality of MOS transistors are formed on an SOI (Silicon On Insulator) substrate. Each MOS transistor includes a source region, a drain region, and a body region located between the source region and the drain region. The body region of at least one N channel MOS transistor is electrically fixed. The body region of at least one P channel MOS transistor is rendered floating.
Claims
exact text as granted — not AI-modified1 - 36 . (canceled)
37 . A semiconductor memory device comprising at least one first semiconductor element and at least one second semiconductor element,
wherein an element isolation film for isolating said first semiconductor element and said second semiconductor element from each other is formed on an SOI substrate, wherein said element isolation film is in contact with an insulation film in said SOI substrate.
38 - 43 . (canceled)Join the waitlist — get patent alerts
Track US2007257313A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.