Apparatus and method for electrochemical processing of thin films on resistive substrates
Abstract
An electrochemical process comprising: providing a 125 mm or larger semiconductor wafer in electrical contact with a conducting surface, wherein at least a portion of the semiconductor wafer is in contact with an electrolytic solution, said semiconductor wafer functioning as a first electrode; providing a second electrode in the electrolytic solution, the first and second electrode connected to opposite ends of an electric power source; and irradiating a surface of the semiconductor wafer with a light source as an electric current is applied across the first and the second electrodes. The invention is also directed to an apparatus including a light source and electrochemical components to conduct the electrochemical process.
Claims
exact text as granted — not AI-modified1 . An electrochemical process comprising:
providing a 125 mm or larger semiconductor wafer in electrical contact with a conducting surface, wherein at least a portion of the semiconductor wafer is in contact with an electrolytic solution, said semiconductor wafer functioning as a first electrode; providing a second electrode in the electrolytic solution, the first and second electrode connected to opposite ends of an electric power source; and irradiating a surface of the semiconductor wafer with a light source as an electric current is applied across the first and the second electrodes.
2 . The process of claim 1 wherein the semiconductor wafer is a doped or undoped semiconductor wafer selected from a Si semiconductor wafer, a Ge semiconductor wafer or a (Si—Ge) semiconductor wafer, or a doped or undoped binary, tertiary and quaternary semiconductor wafer comprising Ga, As, P, Sb, In, Se and Al.
3 . The process of claim 1 wherein the semiconductor wafer is a doped or undoped II-VI semiconductor wafer comprising Cd, Zn, Te, Se and S, a doped or undoped oxide semiconductor wafer comprising Ti or Zr oxides, a Cu-based or Sr-based semiconductor wafer or a semiconductor-on-insulator semiconductor wafer selected from silicon-on-insulator or silicon germanium-on-insulator combinations.
4 . The process of claim 1 wherein the semiconductor wafer comprises an electroluminescent polymer selected from polyacetylene, poly(dialkoxy p-phenylene-vinylene, poly(dialkylfluorene) and the derivatives of each thereof.
5 . The process of claim 1 wherein the electrochemical process is an electrodeposition process in which one or more elements from the group consisting of Ru, Re, Ni, Pd, Co, Pt, Rh, Cr, Mn, Cu, Fe, Zn, Cd, Ce, Ta, Hf, Ti, Al, V, Ga, Ge, As, Se, Nb, Mo, Ag, In, Sn, Sb, Te, W, Os, Ir, Au, Hg, Tl, Pb, Bi, P, B, C, N, O, Cl or any combination thereof is deposited on the semiconductor wafer.
6 . The process of claim 5 wherein the applied electric current is from 1 μA/cm 2 to 50 A/cm 2 , and is operated in the galvanostatic, potentiostatic or pulse mode.
7 . The process of claim 1 wherein the electrochemical process is an electrodeposition process and the semiconductor wafer is a doped or undoped semiconductor wafer selected from a Si semiconductor wafer, a Ge semiconductor wafer or a (Si—Ge) semiconductor wafer, or a doped or undoped binary, tertiary and quaternary semiconductor wafer comprising of Ga, As, P, Sb, In, Al, Se, Cd, Zn, Te, Se and S.
8 . The process of claim 1 wherein the electrochemical process is an electroetch or anodizing process, and the semiconductor wafer comprises one or more metals selected from Al, Ti, Zr, Nb, Hf, Ta, W, Mo and Cd, or the semiconductor wafer is a semiconductor wafer comprising Si, Ge, In, Ga, Sb, P and any combination thereof.
9 . The process of claim 8 wherein the electric current is applied as a constant current, constant potential, a pulse current or a pulse potential.
10 . The process of claim 1 wherein the electrochemical process is an electrodeposition process and further comprises annealing an electrodeposited metal or metal alloy to provide a predominantly crystalline metal film.
11 . The process of claim 10 wherein the deposited and annealed metal film consists essentially of ruthenium, said ruthenium film having an XRD spectrum in which the reflected intensity for crystallographic orientation 101 is greater than that of 100 or 002.
12 . The process of claim 10 wherein the deposited and annealed metal film consists essentially of rhenium, said rhenium film having an XRD spectrum in which the reflected intensity for crystallographic orientation 002 is greater than that of 002 or 100.
13 . The process of claim 1 wherein the electrochemical process is an electrodeposition process and the semiconductor wafer includes n-type silicon regions and p-type silicon regions, wherein a selective electrodeposition of a metal on the p-type region occurs during the irradiation of the semiconductor wafer.
14 . The process of claim 1 wherein the electrochemical process is an electrodeposition process and the semiconductor wafer comprises p-type silicon with a dielectric.
15 . The process of claim 14 wherein the electrolytic solution comprises one or more ions selected from the group consisting of Ru, Re, Ni, Pd, Co, Pt, Rh, Cr, Mn, Cu, Fe, Zn, Cd, Ce, Ta, Hf, Ti, Al, V, Ga, Ge, As, Se, Nb, Mo, Ag, In, Sn, Sb, Te, W, Os, Ir, Au, Hg, Tl, Pb, Bi, P, B, C, N, O, Cl or any combination thereof.
16 . A cathodic electrodeposition process of a 125 mm or larger, p-type semiconductor wafer with an optional insulating layer, the process comprising:
positioning the 125 mm or larger, p-type semiconductor wafer in an electrolytic solution; positioning a counter electrode in the electrolytic solution; illuminating a front side of the p-type semiconductor wafer or the insulating layer, if present, or illuminating a back side of the semiconductor wafer, with a light source; and applying an electric current to the semiconductor wafer and to the counter electrode.
17 . The process of claim 16 further comprising depositing one or more elements selected from the group consisting of Ru, Re, Ni, Pd, Co, Pt, Rh, Cr, Mn, Cu, Fe, Zn, Cd, Ce, Ta, Hf, Ti, Al, V, Ga, Ge, As, Se, Nb, Mo, Ag, In, Sn, Sb, Te, W, Os, Ir, Au, Hg, Tl, Pb, Bi, P, B, C, N, O, Cl or any combination thereof on the semiconductor wafer by applying an electric current from 1 μA/cm 2 to 50 A/cm 2 , said electric current applied in the galvanostatic, potentiostatic or pulse mode.
18 . An anodic electrochemical process of a 125 mm or larger, n-type semiconductor wafer with a metal layer, the process comprising:
positioning the 125 mm or larger, n-type semiconductor wafer in an electrolytic solution; positioning a counter electrode in the electrolytic solution; illuminating a front side or the back side of the n-type semiconductor wafer with a light source; and applying an electric current to the semiconductor wafer and to the counter electrode.
19 . The process of claim 18 wherein the anodic electrochemical process is an electroetching process of the metal layer or an anodization process of the metal layer disposed on the semiconductor wafer.
20 . An apparatus comprising:
a tank for holding an electrolytic solution; a conducting surface in contact with a surface of a semiconductor wafer, said conducting surface in electrical contact with an electric power source; a light source facing an opposite surface of the semiconductor wafer; and an electrode in electrical contact with the electric power source, wherein the electrode is positioned in the tank so that the electrode can come in contact with the electrolytic solution.Join the waitlist — get patent alerts
Track US2007256937A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.