Operating voltage determination for and integrated circuit

Abstract

Voltage-binning of individual integrated circuits is achieved by operating those integrated circuits at a plurality of required clock frequencies and for each of those frequencies determining the minimum supply voltage level which produces a pass result for a series of applied test vectors.

1 . A method of sorting integrated circuits, said method comprising the steps of: 
 providing a plurality of integrated circuits, each circuit having a lowest operating voltage capable of sustaining a required frequency; and    operating voltage binning of said integrated circuits in accordance with their respective lowest operating voltage.    
   
   
       2 . A method as claimed in  claim 1 , wherein an operating voltage is determined for each of a plurality of required operating frequencies.  
   
   
       3 . A method as claimed in  claim 1 , wherein said operating voltage includes a supply level voltage.  
   
   
       4 . A method as claimed in  claim 1 , wherein said operating voltage includes a body bias voltage.  
   
   
       5 . A method as claimed in  claim 1 , wherein said operating voltage is determined such that it is higher than said lowest operating voltage by at least a predetermined margin.  
   
   
       6 . A method as claimed in  claim 1 , wherein said operating voltage and said required operating frequency are stored in a storage module associated with said integrated circuit.  
   
   
       7 . A method as claimed in  claim 6 , wherein said storage module is a programmable read only memory.  
   
   
       8 . A method as claimed in  claim 6 , wherein said storage module is a bar code applied to packaging of said individual integrated circuit.  
   
   
       9 . A method as claimed in  claim 1 , wherein said method is performed upon fabrication of said integrated circuit prior to incorporating said integrated circuit within a larger circuit.  
   
   
       10 . A method as claimed in  claim 1 , wherein said method is performed upon coupling said integrated circuit to further circuit elements within a larger circuit.