US2007250735A1PendingUtilityA1

Semiconductor integrated circuit

Assignee: MOMII MASATOPriority: Jul 26, 2004Filed: Jun 19, 2007Published: Oct 25, 2007
Est. expiryJul 26, 2024(expired)· nominal 20-yr term from priority
H03L 7/08
39
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A microcontroller formed on a single chip semiconductor includes a central processing unit; an oscillator unit adapted to generate a system clock, and an electrical fuse unit including a control information for trimming a frequency of the oscillator unit. The central processing unit is operable to generate said control information which controls the oscillator unit, using an external clock from outside the microcontroller. The oscillator unit is trimmed by the control information for generating the system clock. Also, the central processing unit is capable of operating by the system clock.

Claims

exact text as granted — not AI-modified
1 . A microcontroller formed on a single chip semiconductor, comprising: 
 a central processing unit;    a oscillator unit adapted to generate a system clock; and    an electrical fuse unit including control information for trimming a frequency of said oscillator unit,    wherein said central processing unit is operable to generate said control information which controls said oscillator unit, using an external clock from outside the microcontroller,    wherein said oscillator unit is trimmed by said control information for generating said system clock, and    wherein said central processing unit is capable of operating by said system clock.    
   
   
       2 . A microcontroller formed on a single chip semiconductor according to  claim 1 , further comprising: 
 a circuit module controlled by said central processing unit,    wherein said oscillator unit is operable to generate a plurality of clock signals, and a frequency of said clock signals are different from a frequency of said system clock, and    wherein one of said clock signals is provided to said circuit module.    
   
   
       3 . A microcontroller formed on a single chip semiconductor according to  claim 1 , 
 wherein said electric fuse unit includes a first memory region having control information for said system clock, and a second memory region having control information for said circuit module.    
   
   
       4 . A microcontroller formed on a single chip semiconductor according to  claim 3 , 
 wherein said central processing unit is adapted to store said control information for said oscillator unit to a register unit, when said control information is generated, and    wherein said control information is stored to said electrical fuse unit at the end of a system clock frequency setting operation.    
   
   
       5 . A microcontroller formed on a single chip semiconductor according to  claim 4 , 
 wherein said control information in said electrical fuse unit is set to a frequency control register while said single chip semiconductor is initialized.    
   
   
       6 . A microcontroller, comprising: 
 a CPU;    an internal oscillating circuit adapted to generate a plurality of internal clocks; and    a fuse circuit,    wherein said CPU is operable to generate trimming data for causing a frequency of said internal clock to coincide with a frequency of an external clock signal inputted from outside said microcontroller,    wherein said fuse circuit is adapted to store said trimming data of said internal oscillating circuit, and    wherein said internal oscillating circuit is operable to provide said internal clock generated using said trimming data to said CPU.    
   
   
       7 . A microcontroller according to  claim 6 , further comprising: 
 an internal circuit module,    wherein said internal clocks include said internal clock for said CPU and a clock for said internal circuit module which frequency is different from said internal clock for said CPU.    
   
   
       8 . A microcontroller according to  claim 6 , 
 wherein said internal oscillating circuit includes a dividing unit which is operable to generate said plurality of internal clocks for dividing an internal oscillation clock.

Join the waitlist — get patent alerts

Track US2007250735A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.