US2007243643A1PendingUtilityA1

Circular Test Pads on Scribe Street Area

Assignee: TEXAS INSTRUMENTS INCPriority: May 14, 2002Filed: Jun 22, 2007Published: Oct 18, 2007
Est. expiryMay 14, 2022(expired)· nominal 20-yr term from priority
H10P 74/273
37
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Claims

Abstract

A semiconductor wafer design and process having test pads ( 36 ) reducing cracks generated during the wafer saw process from extending into and damaging adjacent die. The present invention provides a plurality of circular test pads ( 36 ) in a wafer scribe street ( 34 ) such that any cracks generated in the test pad during wafer saw self terminate in the periphery of the circular test pad. By providing a curved test pad periphery, cracks will tend to propagate along the edges of the test pads and self terminate therein. The circular test pads avoid any sharp corners as is conventional in rectangular test pads which tend to facilitate the extension of cracks from corners to extend into the adjacent wafer die ( 32 ). The present invention utilizes existing semiconductor fab processing and utilizes new reticle sets to define the curved test pads.

Claims

exact text as granted — not AI-modified
1 . A method of forming a semiconductor wafer, comprising the steps of: 
 defining a plurality of integrated circuits on said wafer, said integrated circuits being separated from one another by a scribe street; and    defining a plurality of test pads in said scribe street and connected to said respective integrated circuits, said test pads having a curved profile.    
   
   
       2 . The method as specified in  claim 1  wherein said test pad curved profile is formed and adapted to reduce the propagation of cracks to the corresponding integrated circuit during sawing of said scribe street.  
   
   
       3 . The method as specified in  claim 2  wherein said test pad has a round profile.  
   
   
       4 . The method as specified in  claim 2  wherein said test pad has an elliptical profile.  
   
   
       5 . The method as specified in  claim 3  wherein said test pad extends closely proximate one said integrated circuit.  
   
   
       6 . The method as specified in  claim 2  wherein said test pad is formed such that cracks developed in said test pad during wafer saw terminate in said test pad.

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