Diffusion barrier with low dielectric constant and semiconductor device containing same
Abstract
A diffusion barrier useful in semiconductor electronic devices, such as multi-level interconnect wiring structures, is provided. The diffusion barrier is characterized as having a low-dielectric constant of less than 3.5, preferably less than 3.0, as well as being capable of substantially preventing Cu and/or oxygen from diffusing into the active device areas of the electronic device. Since the diffusion barrier has a low-dielectric constant, the diffusion barrier has only a minor effect on the effective dielectric constant of the interconnect structure. The low-k diffusion battier includes atoms of Si, C, H and N. The N atoms are non-uniformly distributed within the low-k diffusion barrier. Optionally, the low-k diffusion barrier may include atoms of Ge, O, halogens such as F or any combination thereof.
Claims
exact text as granted — not AI-modified1 . An electronic device comprising:
a substrate containing a plurality of conductive elements; and a diffusion barrier having a dielectric constant of less than 3.5 located atop at least a portion of the substrate, said diffusion barrier comprising atoms of at least Si, C, H and N and is capable of substantially preventing Cu and/or oxygen from diffusing therethrough, said N atoms being non-uniformly distributed within the diffusion barrier.
2 . The electronic device of claim 1 wherein said conductive elements are composed of Al or Cu.
3 . The electronic device of claim 1 wherein said conductive elements are formed into openings which are located in a first dielectric layer.
4 . The electronic device of claim 1 wherein said N atoms are located in an upper region of said diffusion barrier.
5 . The electronic device of claim 1 wherein said N atoms are located in an upper region and a middle region of diffusion barrier.
6 . The electronic device of claim 4 further comprising a lower region containing said N atoms.
7 . The electronic device of claim 5 further comprising a lower region containing said N atoms.
8 . The electronic device of claim 1 wherein said Si atoms are present in an amount from about 10 to about 40 atomic percent; said C atoms are present in an amount from about 15 to about 50 atomic percent; said H atoms are present in an amount from about 25 to about 50 atomic percent; and said N atoms are present in an amount from about 1 to about 20 atomic percent in densified layers of the diffusion barrier.
9 . The electronic device of claim 1 wherein said diffusion barrier further comprising atoms of O, Ge, halogen or mixtures thereof.
10 . A method of fabricating a diffusion barrier structure comprising the steps of:
positioning a substrate containing a plurality of conductive elements in a reactor chamber of a parallel plate plasma enhanced chemical vapor deposition reactor; flowing a precursor gas containing a mixture of molecules comprising atoms of at least Si, C and H and organic molecules into the reactor chamber; forming a dielectric film comprising a first phase comprised of atoms of at least Si, C and H onto at least a portion of said substrate utilizing at least said precursor gas mixture; exposing the dielectric film to a plasma so as to densify a top layer of the dielectric film; introducing nitrogen atoms into at least a portion of the densified dielectric film; and annealing to convert said dielectric film containing nitrogen atoms into a diffusion barrier having a dielectric constant of less than 3.5 and said N atoms are non-uniformly distributed within the diffusion barrier.
11 . The method of claim 10 wherein said precursor gas mixture comprises a first precursor gas, a second precursor gas and an diluent gas.
12 . The method of claim 11 wherein said first precursor gas comprises atoms of Si, C and H and optionally Ge, O, a halogen or mixtures thereof.
13 . The method of claim 12 wherein said first precursor gas is an organosilane.
14 . The method of claim 11 wherein said second precursor gas comprises atoms of C and H, and optionally Ge, O, a halogen or mixtures thereof.
15 . The method of claim 14 wherein said second precursor gas is a hydrocarbon.
16 . The method of claim 11 wherein said diluent gas is comprised of He.
17 . The method of claim 11 wherein said diluent gas is comprised of CO 2 or mixtures of CO 2 with O 2 , or CO 2 with He, Ar, Ne, or Xe.
18 . The method of claim 10 wherein said nitrogen atoms are introduced using pure NH 3 or a mixture comprising at least a nitrogen-containing gas.
19 . The method of claim 10 wherein said steps of plasma exposure and introducing nitrogen atoms are repeated at least twice.
20 . The method of claim 10 further comprising flowing a cleaning gas into said reactor to remove oxides and other undesirable compounds from said substrate prior to flowing said precursor gas.
21 . The method of claim 10 wherein said plasma enhanced chemical vapor deposition reactor comprises a parallel plate reactor.
22 . The method of claim 10 wherein said annealing is performed at a temperature from about 200° to about 500° C.
23 . A method of fabricating a diffusion barrier structure comprising the steps of:
positioning a substrate containing a plurality of conductive elements in a reactor chamber of a plasma enhanced chemical vapor deposition reactor; flowing a precursor gas containing a mixture of molecules comprising atoms of at least Si, C and H and organic molecules into the reactor chamber; forming a dielectric film comprising a first phase comprised of atoms of at least Si, C and H onto at least a portion of said substrate utilizing at least said precursor gas mixture; exposing the dielectric film to a plasma so as to densify a top layer of the dielectric film; and introducing nitrogen atoms into at least a portion of the densified dielectric film.
24 . The method of claim 23 wherein said plasma enhanced chemical vapor deposition reactor comprises a parallel plate reactor.Join the waitlist — get patent alerts
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