US2007237332A1PendingUtilityA1

Method and system for encrypting and decrypting data using an external agent

Assignee: SILICON IMAGE INCPriority: Nov 21, 2001Filed: Jun 6, 2007Published: Oct 11, 2007
Est. expiryNov 21, 2021(expired)· nominal 20-yr term from priority
Inventors:James D. Lyle
H04L 9/3271H04L 9/0637H04L 63/0471H04L 63/0464H04L 9/3213H04L 2209/125H04L 2209/60H04L 9/12H04L 9/0631
50
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Claims

Abstract

A communication system including a transmitter, a receiver, a communication link (for example, a TMDS-like link), and preferably also an external agent with which the transmitter and receiver can communicate, in which video data (or other data) are encrypted, the encrypted data are transmitted from the transmitter to the receiver, and the transmitted data are decrypted in the receiver, a transmitter and a receiver for use in such a system, a cipher engine for use in such a transmitter or receiver, a method for operating such a transmitter or receiver to encrypt or decrypt data, and a method for distributing keys to the transmitter and receiver. The receiver can be a player coupled to a downstream receiver by a TMDS-like link, and configured to re-encrypt the decrypted data (for example, using an AES or HDCP protocol) and send re-encrypted data over the link to the receiver. Optionally, the player is a repeater which translates the decrypted data from the transmitter, and then re-encrypts the translated data for transmission to the downstream receiver. The transmitter can itself be a player that receives and decrypts encrypted data from an upstream source. In preferred embodiments, the system implements a content protection protocol including a challenge-response procedure. After a new key is supplied to the receiver (and the same new key should have been supplied to the transmitter) and before the receiver can use the new key, the challenge-response procedure requires that the receiver validate the transmitter by verifying that the transmitter has proper knowledge of the new key.

Claims

exact text as granted — not AI-modified
1 - 36 . (canceled)  
   
   
       37 . A communication system including: 
 a transmitter including a cipher engine;    a receiver including a second cipher engine; and    a serial link coupled between the transmitter and the receiver, wherein the transmitter and the receiver are configured to implement a symmetric block protocol in which the transmitter sends encrypted data over the link to the receiver, and the second cipher engine decrypts the encrypted data in response to a key and a sequence of count values, wherein the cipher engine is configured to generate a randomizer value, the transmitter is configured to transmit the randomizer value to the receiver, and the receiver is configured to include the randomizer value as a field of at least one of the count values.    
   
   
       38 . The system of  claim 37 , wherein the randomizer value is a pseudo-random value.  
   
   
       39 . The system of  claim 38 , wherein the second cipher engine is configured to decrypt the encrypted data in response to the sequence of count values and a sequence of keys including said key, the cipher engine is configured to generate a sequence of pseudo-random values including the pseudo-random value, the transmitter is configured to transmit the sequence of pseudo-random values to the receiver, and the receiver is configured to include each pseudo-random value of the sequence of pseudo-random values as a field of a different one of the count values.  
   
   
       40 . The system of  claim 37 , wherein the serial link is a TMDS-like link including at least one encrypted data transmission channel and a communication channel, and the transmitter is configured to transmit the randomizer value over the communication channel to the receiver.  
   
   
       41 . A cipher engine for use in a receiver of a communication system, wherein the system includes a transmitter having a cipher engine and a serial link coupled to the transmitter, the receiver is configured to be coupled to the serial link to receive encrypted data transmitted over the serial link from the transmitter, and the receiver is configured to be coupled to receive a pseudo-random value from the transmitter, said cipher engine including: 
 counter circuitry configured to generate a sequence of count values, wherein each of the count values has a field determined by the pseudo-random value value; and    a block cipher, coupled to receive a key and coupled to the counter circuitry to receive each of at least a subset of the count values, and configured to generate a pseudo-random output value, for use in decrypting the encrypted data, in response to the key and each of the count values received from the counter circuitry.    
   
   
       42 . A cipher engine configured to implement a symmetric block protocol, said cipher engine including: 
 counter circuitry configured to generate a sequence of count values; and    a block cipher, coupled to receive a sequence of keys, coupled to the counter circuitry to receive each of at least a subset of the count values, and configured to generate a sequence of pseudo-random output values in response to the count values received from the counter circuitry and the keys, wherein the block cipher is configured to generate each of a first subset of the pseudo-random output values by performing X rounds of a cipher algorithm and to generate each of a second subset of the pseudo-random output values by performing Y rounds of the cipher algorithm, where X is an integer and Y is an integer greater than X.    
   
   
       43 . The cipher engine of  claim 42 , wherein the first subset of the pseudo-random output values but not the second subset of the pseudo-random output values is for use in decrypting blocks of encrypted video data, and each of the pseudo-random output values in the first subset is sufficient for decrypting a block of Z pixels of the encrypted video data, where Z is an integer.  
   
   
       44 . The cipher engine of  claim 43 , wherein the symmetric block protocol is the AES-128 CTR protocol, and wherein X=5, Y=10, and Z=5.  
   
   
       45 . The cipher engine of  claim 43 , wherein the symmetric block protocol is the AES-128 CTR protocol, the block cipher operates in response to a pixel clock, the block cipher is configured such that no more than one cycle of the pixel clock is required to perform each of the rounds of the cipher algorithm, and Z=5.  
   
   
       46 . The cipher engine of  claim 42 , wherein the block cipher is configured: 
 to generate an initial pseudo-random output value by performing rounds of a cipher algorithm in response to an initial one of the count values received from the counter circuitry and one of the keys,    to include at least a subset of bits of the initial pseudo-random value as a field of a subsequent one of the count values, and then    to generate a sequence of the first subset of the pseudo-random output values by performing rounds of the cipher algorithm in response to at least one of: said subsequent one of the count values and an incremented version of said subsequent one of the count values.    
   
   
       47 . The cipher engine of  claim 46 , also including a register, and wherein the cipher engine is configured to cause the block cipher to write to the register at least some of the bits of the initial pseudo-random value.  
   
   
       48 . The cipher engine of  claim 42 , also including: 
 double buffering circuitry coupled to the block cipher, wherein the double buffering circuitry is configured to hold at least two keys of the sequence of keys and to assert either one of said two keys to the block cipher, whereby the block cipher can employ one of the keys held in the double buffering circuitry to generate a subset of the pseudo-random Output values while another key is written to the double buffering circuitry or another one of the keys held in the double buffering circuitry is decoded or verified.    
   
   
       49 . A communication system, comprising: 
 a transmitter and a receiver, each of the transmitter and the receiver including a cipher engine; and    a serial link coupled between the transmitter and the receiver, wherein the transmitter and the receiver are configured to implement a symmetric block protocol in which the transmitter sends encrypted video data over the link to the receiver, and the cipher engine of the receiver decrypts the encrypted video data in response to a sequence of keys and a sequence of count values, wherein the cipher engine of the receiver includes:    counter circuitry configured to generate the sequence of count values; and    a block cipher, coupled to receive the sequence of keys, coupled to the counter circuitry to receive each of at least a subset of the count values, and configured to generate a sequence of pseudo-random output values in response to the count values received from the counter circuitry and the keys, wherein the block cipher is configured to generate each of a first subset of the pseudo-random output values by performing X rounds of a cipher algorithm and each of a second subset of the pseudo-random output values by performing Y rounds of the cipher algorithm, where X is an integer and Y is an integer greater than X.    
   
   
       50 . The system of  claim 49 , wherein the first subset of the pseudo-random output values but not the second subset of the pseudo-random output values is for use in decrypting blocks of the encrypted video data, and each of the pseudo-random output values in the first subset is sufficient for decrypting a block of Z pixels of the encrypted video data, where Z is an integer.  
   
   
       51 . The system of  claim 50 , wherein the symmetric block protocol is the AES-128 CTR protocol, and wherein X=5, Y=10, and Z=5.  
   
   
       52 . The system of  claim 50 , wherein the symmetric block protocol is the AES-128 CTR protocol, the block cipher operates in response to a pixel clock, the block cipher is configured such that no more than one cycle of the pixel clock is required to perform each of the rounds of the cipher algorithm, and Z=5.  
   
   
       53 - 57 . (canceled)  
   
   
       58 . A cipher engine, including: 
 control circuitry configured be coupled to a TMDS-like link to receive a synchronization signal from said link; and    circuitry, coupled to receive a stream of data having active data periods separated by blanking intervals, and configured to perform at least one of an encryption operation and a decryption operation on the data in response to a control signal from the control circuitry,    wherein the control circuitry generates the control signal in response to the synchronization signal, the synchronization signal is received in one of the blanking intervals, the synchronization signal is indicative of a sequence of code words, and the control circuitry is configured to determine a value of the synchronization signal from the number of code words in the sequence.    
   
   
       59 . The cipher engine of  claim 58 , wherein the sequence of code words comprises N code words, where N is an integer, and the control circuitry is configured to determine said value of the synchronization signal by determining whether N has a value in a predetermined range.  
   
   
       60 . The cipher engine of  claim 59 , wherein the control circuitry is configured to recognize the synchronization signal as a key change signal by determining that N has a value in said predetermined range.  
   
   
       61 . The cipher engine of  claim 58 , wherein the sequence of code words comprises N code words, where N is an integer, and the control circuitry is configured to determine said value of the synchronization signal by determining whether N satisfies L<N<M, where L is an integer, M is an integer greater than L, (M−L)=kN, and k is a predetermined proportionality constant.  
   
   
       62 . The cipher engine of  claim 61 , wherein the control circuitry is configured to recognize the synchronization signal as a key change signal by determining that N satisfies L<N<M.  
   
   
       63 . A cipher engine configured to implement a symmetric block protocol, said cipher engine including: 
 control circuitry configured be coupled to a TMDS-like link to receive at least a first control signal and a second control signal from said link;    counter circuitry coupled to the control circuitry and configured to generate a sequence of count values under control of the control circuitry; and    a block cipher, coupled to receive a sequence of keys, coupled to the control circuitry, and coupled to the counter circuitry to receive each of at least a subset of the count values, and configured to generate a sequence of pseudo-random output values in response to the count values received from the counter circuitry and the keys,    wherein the control circuitry is configured to trigger initialization of the counter circuitry in response to the first control signal, and the control circuitry is configured to respond to the second control signal by causing the block cipher to accept the next one of the keys.    
   
   
       64 . A communication system including: 
 a transmitter;    a receiver; and    a serial link coupled between the transmitter and the receiver, wherein the transmitter and the receiver are configured to implement a symmetric block content protection protocol, the transmitter is operable in an encryption mode in which it generates encrypted data and transmits the encrypted data over the link to the receiver, the receiver is operable in a decryption mode in which it generates decrypted data by decrypting the encrypted data, and each of the transmitter and the receiver includes a cipher engine that implements the protocol, each said cipher engine including:    counter circuitry configured to generate a sequence of count values;    a register; and    a block cipher coupled to receive a sequence of keys, and coupled to the counter circuitry to receive each of at least a subset of the count values, wherein the cipher engine is configured to cause the block cipher to generate an initial pseudo-random output value by performing rounds of a cipher algorithm in response to an initial one of the count values received from the counter circuitry and one of the keys, and to write at least a subset of bits of the initial pseudo-random value to the register, wherein said subset of bits determines a link integrity value, and wherein    the transmitter is configured to perform a link integrity check, by accessing the link integrity value in the register of the receiver's cipher engine and processing said link integrity value with the link integrity value in the register of the transmitter's cipher engine.    
   
   
       65 . A translating router, including: 
 decryption circuitry, configured to be coupled to a first serial link and to generate decrypted data from encrypted data received over the first serial link in accordance with a content protection protocol;    translation circuitry coupled to the decryption circuitry and configured to generate translated data by processing the decrypted data; and    encryption circuitry coupled to the translation circuitry, and configured to generate re-encrypted data from the translated data, in accordance with a second content protection protocol, and to assert the re-encrypted data to the second serial link.    
   
   
       66 . The translating router of  claim 65 , wherein the at least one of the first serial link and the second serial link is a TMDS-like link.  
   
   
       67 . The translating router of  claim 65 , wherein the second symmetric content protection protocol is different than the symmetric content protection protocol.  
   
   
       68 . The translating router of  claim 65 , wherein the second symmetric content protection protocol is identical to the symmetric content protection protocol.  
   
   
       69 . The translating router of  claim 65 , wherein at least one of the content protection protocol and the second symmetric content protection protocol is a symmetric content protection protocol.  
   
   
       70 - 87 . (canceled)

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