Liquid crystal display device

Abstract

A liquid crystal display device having a narrowed peripheral area, particularly, a liquid crystal display device in which disconnection or short-circuiting of connecting lines disposed in the peripheral area is restrained is provided. The liquid crystal display device includes a pixel area having pixel electrodes, and a peripheral area surrounding the pixel area, and a gate driver and a drain driver are disposed in the peripheral area. A plurality of gate connecting lines which connect the gate driver and a plurality of gate lines are stacked in the peripheral area.

1 . A liquid crystal display device comprising a first substrate, a second substrate, a liquid crystal layer interposed between the first substrate and the second substrate, wherein: 
 the first substrate has a pixel area, a peripheral area, gate lines, drain lines, charge-holding lines, gate connecting lines, and at least one common line, the pixel area includes pixel electrodes, the gate lines, the drain lines, and the charge-holding lines,    the peripheral area surrounds the pixel area,    the gate lines extend in a first direction and are juxtaposed in a second direction which crosses the first direction in the pixel area, and are formed from the pixel area to the peripheral area,    the drain lines are extended in the second direction and juxtaposed in the first direction,    the charge-holding lines have at least one part which extends in parallel with the gate lines, and are formed from the pixel area to the peripheral area,    the gate connecting lines are disposed in the peripheral area,    the first substrate has two of short sides and two of long sides,    a first side is one of the short sides and a second side is the other,    a third side is one of the long sides and a fourth side is the other,    the respective gate connecting lines are connected to corresponding one of the gate lines in the peripheral area at least at one of the third side and the fourth side, and extend toward the first side,    charge-holding capacitance is formed between the pixel electrodes and the charge-holding lines,    the common line connects the charge-holding lines each other,    the gate lines cross the common line, and    the gate lines are insulated from and disposed under the common line.    
   
   
       2 . A liquid crystal display device according to  claim 1 , wherein the common line has at least one part which extends in parallel with the drain lines.  
   
   
       3 . A liquid crystal display device according to  claim 1 , wherein the common line has at least one part which has a larger width than a width of the charge-holding lines.  
   
   
       4 . A liquid crystal display device according to  claim 1 , wherein: 
 the gate lines have first gate lines and second gate lines,    the gate connecting lines have first gate connecting lines and second gate connecting lines,    the respective first gate connecting lines are connected to corresponding one of the first gate lines in the peripheral area at the third side, and    the respective second gate connecting lines are connected to corresponding one of the second gate lines in the peripheral area at the fourth side.    
   
   
       5 . A liquid crystal display device according to  claim 1 , wherein: 
 the first substrate has a first common line and a second line,    the charge-holding lines have first charge-holding lines and second charge-holding lines,    the respective first charge-holding lines are connected to the first common line in the peripheral area at the third side, and    the respective second charge-holding lines are connected to the second common line in the peripheral area at the fourth side.    
   
   
       6 . A liquid crystal display device according to  claim 1 , wherein: 
 a liquid crystal driving circuit is disposed on the first substrate, and    the liquid crystal driving circuit is connected to the gate connecting lines in the peripheral area at the first side.    
   
   
       7 . A liquid crystal display device comprising a first substrate, a second substrate, a liquid crystal layer interposed between the first substrate and the second substrate, wherein: 
 the first substrate has a pixel area, a peripheral area, gate lines, drain lines, charge-holding lines, gate connecting lines, and common lines,    the pixel area includes pixel electrodes, the gate lines, the drain lines, and the charge-holding lines,    the peripheral area surrounds the pixel area,    the gate lines extend in a first direction and are juxtaposed in a second direction which crosses the first direction in the pixel area, and are formed from the pixel area to the peripheral area,    the drain lines are extended in the second direction and juxtaposed in the first direction,    the charge-holding lines have at least one part which extends in parallel with the gate lines, and are formed from the pixel area to the peripheral area,    the gate connecting lines are disposed in the peripheral area,    the common lines have at least one part which extends in parallel with the drain lines, and at least one part which has a larger width than a width of the charge-holding lines,    the first substrate has two of short sides and two of long sides,    a first side is one of the short sides and a second side is the other,    a third side is one of the long sides and a fourth side is the other,    the gate lines have first gate lines and second gate lines,    the gate connecting lines have first gate connecting lines and second gate connecting lines,    the respective first gate connecting lines are connected to corresponding one of the first gate lines in the peripheral area at the third side,    the respective second gate connecting lines are connected to corresponding one of the second gate lines in the peripheral area at the fourth side,    charge-holding capacitance is formed between the pixel electrodes and the charge-holding lines,    the charge-holding lines have first charge-holding lines and second charge-holding lines,    the common lines have a first common line and a second common line,    the respective first charge-holding lines are connected to the first common line in the peripheral area at the third side,    the respective second charge-holding lines are connected to the second common line in the peripheral area at the fourth side,    the charge-holding lines have first charge-holding hues and second charge-holding lines,    the common lines have a first common line and a second common line,    the first gate lines cross the first common line,    the first gate lines are insulated from and disposed under the first common line,    the second gate lines cross the second common line, and    the second gate lines are insulated from and disposed under the second common line.