Instruction conversion apparatus and instruction conversion method providing power control information, program and circuit for implementing the instruction conversion, and microprocessor for executing the converted instruction

Abstract

An instruction conversion apparatus for optimizing an instruction program formed of a plurality of instructions to be suitable for execution by a microprocessor that has a plurality of hard ware resources. The apparatus includes a power control information analysis unit for detecting a power controllable hardware resource that does not operate for a certain specific instruction region in the instruction program while the microprocessor is at work, and a power control instruction providing unit for providing the instruction program with an instruction regarding the power control based on the result of the detection made by the power control information analysis unit.

1 . An instruction conversion apparatus for optimizing an instruction program formed of a plurality of instructions to be suitable for execution by a microprocessor that has a plurality of hard ware resources, comprising: 
 a power control information analysis unit for detecting a power controllable hardware resource that does not operate for a certain specific instruction region in said instruction program while said microprocessor is at work; and    a power control instruction providing unit for providing said instruction program with an instruction regarding the power control based on the result of the detection made by said power control information analysis unit.    
   
   
       2 . The instruction conversion apparatus of  claim 1 , further comprising: 
 an instruction-wise hardware resource table storage unit for storing information as to which of the hardware resources is put into operation by each of respective instructions among said instruction program; wherein    said power control information analysis unit detects, based on the information stored in said instruction-wise hardware resource table storage unit, a hardware resource that does not operate for a certain specific instruction region while said microprocessor is at work as the power controllable hardware.    
   
   
       3 . The instruction conversion apparatus of  claim 2 , wherein 
 said power control instruction providing unit provides said instruction program with information regarding the power control by inserting an instruction to halt or to resume operation of a hardware resource.    
   
   
       4 . The instruction conversion apparatus of  claim 2 , wherein 
 said power control instruction providing unit provides an instruction regarding the power control by inserting in said instruction program an instruction to halt a hardware resource at a location immediately before said certain specific instruction region, and an instruction to resume the hardware resource at the end of said certain specific instruction region.    
   
   
       5 . The instruction conversion apparatus of  claim 2 , wherein 
 said power control instruction providing unit provides an instruction regarding the power control by replacing a certain specific instruction among said instruction program with an instruction containing instruction to halt or resume a hardware resource.    
   
   
       6 . The instruction conversion apparatus of  claim 2 , wherein 
 said power control instruction providing unit provides an instruction regarding the power control by replacing an instruction among said instruction program locating immediately before the certain specific instruction region with an instruction containing instruction to halt the hardware resource, and an instruction locating at the end of the certain specific instruction region with an instruction containing instruction to resume the hardware resource.    
   
   
       7 . (canceled)  
   
   
       8 . An instruction conversion apparatus for optimizing an instruction program formed of a plurality of instructions to be suitable for execution by a microprocessor that has a plurality of hard ware resources, comprising: 
 a power control information analysis unit for detecting a power controllable hardware resource that does not operate for a certain specific instruction region in said instruction program while said microprocessor is at work;    a power control instruction providing unit for providing said instruction program with an instruction regarding the power control based on the result of the detection made by said power control information analysis unit, and    a power control level judgment unit for judging a level of the power control and outputting the judgment result to said power control information analysis unit,    wherein said power control information analysis unit detects the power-controllable hardware taking the result of judgment by said power control level judgment unit into consideration, and    wherein said level of the power control corresponds to a length of said certain specific instruction region.    
   
   
       9 . An instruction conversion apparatus for optimizing an instruction program formed of a plurality of instructions to be suitable for execution by a microprocessor that has a plurality of hard ware resources, comprising: 
 a power control information analysis unit for detecting a power controllable hardware resource that does not operate for a certain specific instruction region in said instruction program while said microprocessor is at work;    a power control instruction providing unit for providing said instruction program with an instruction regarding the power control based on the result of the detection made by said power control information analysis unit; and    a power control level judgment unit for judging a level of the power control and outputting the judgment result to said power control information analysis unit,    wherein said power control information analysis unit detects the power-controllable hardware taking the result of judgment by said power control level judgment unit into consideration, and    wherein said level of the power control corresponds to which hardware resources are targets for the power control.    
   
   
       10 . (canceled)  
   
   
       11 . A microprocessor for executing an instruction program converted by instruction conversion apparatus of  claim 1 .  
   
   
       12 . An instruction conversion method for optimizing an instruction program formed of a plurality of instructions to be suitable for execution by a microprocessor, comprising the steps of: 
 detecting a power-controllable hardware resource that does not operate for a certain specific instruction region in said instruction program in said instruction region while said microprocessor is at work; and    providing said instruction program with an instruction regarding the power control based on the result of said detecting step.    
   
   
       13 . (canceled)  
   
   
       14 . An instruction conversion method for optimizing an instruction program formed of a plurality of instructions to be suitable for execution by a microprocessor comprising the steps of: 
 detecting a power-controllable instruction region in said instruction program;    judging a level of the power control; and    providing said instruction program with an instruction regarding the power control based on the result of said detecting step and said judging step,    wherein said level of the power control corresponds to a length of said certain specific instruction region.    
   
   
       15 . An instruction conversion method for optimizing an instruction program formed of a plurality of instructions to be suitable for execution by a microprocessor comprising the steps of: 
 detecting a power-controllable instruction region in said instruction program;    judging a level of the power control; and    providing said instruction program with an instruction regarding the power control based on the result of said detecting step and said judging step    wherein said level of the power control corresponds to which hardware resources are targets for the power control.    
   
   
       16 . An instruction conversion method which converts an instruction program into an object program for execution by a microprocessor, comprising the step of: 
 storing beforehand an information as to which of the hardware resources is operated by an instruction among said instruction program in an instruction-wise hardware resource table.    
   
   
       17 . The instruction conversion method of  claim 16 , comprising the steps of: 
 referring to instruction-wise resource table recorded in accordance with the instruction conversion method of  claim 16  for detecting a hardware resource that dose not operate for a certain specific instruction region while microprocessor is at work, and providing said instruction program with an instruction regarding the power control based on the result of the detection.    
   
   
       18 . The instruction conversion method of  claim 17 , wherein 
 instruction regarding the power control is provided by inserting an instruction to halt or resume a hardware resource in said instruction program.    
   
   
       19 . The instruction conversion method of  claim 17 , wherein 
 instruction regarding the power control is provided by inserting an instruction to halt a hardware resource in said instruction program at a location immediately before the region where the hardware resource may be stopped, and an instruction to resume the hardware resource at the end of the region where the hardware resource may be stopped.    
   
   
       20 . The instruction conversion method of  claim 17 , wherein 
 instruction regarding the power control is provided by replacing an instruction among said instruction program with an instruction containing instruction to halt or resume a hardware resource.    
   
   
       21 . The instruction conversion method of  claim 17 , wherein 
 instruction regarding the power control is provided by replacing an instruction among said instruction program locating immediately before the region where a hardware resource may be stopped with an instruction containing instruction to halt the hardware resource, and an instruction locating at the end of the region where the hardware resource may be stopped with an instruction containing instruction to resume the hardware resource.    
   
   
       22 . An instruction conversion circuit comprising: 
 an instruction-wise hardware resource memory for storing beforehand an information as to whether a hardware resource is put into operation or halt by an instruction code among an object program which is to be executed by a microprocessor,    a power control information analysis circuit for detecting a hardware resource not operating for a certain specific instruction region while microprocessor is at work based on information stored in said instruction-wise hardware resource memory, and    a power control instruction providing circuit for providing an object program with an instruction regarding the power control based on result of detection by said instruction-wise hardware resource analysis circuit.    
   
   
       23 . A microprocessor for executing a program converted by the instruction conversion circuit of  claim 22 .  
   
   
       24 . The microprocessor of  claim 1   1 , comprising 
 a power control register for storing an information regarding the power control based on decoded result of said instruction decoder, and    a condition reset circuit for detecting the interruption, branch, exception, and setting condition of said power control register to a state in which all of the hardware resources are put into operation upon detection of the interruption, branch, exception.    
   
   
       25 . A program, stored in computer readable memory, for operating a computer to function as 
 a power control information analysis unit which refers to an instruction-wise hardware resource table storing beforehand an information as to whether a hardware resource is put into operation or not by an instruction among an instruction program which is to be executed by a microprocessor, for detecting a hardware resource that dose not operate for a certain specific instruction region while microprocessor is at work; and    a power control instruction providing unit for providing an instruction program with an instruction regarding the power control, based on result of the detection by said instruction-wise hardware resource analysis unit.